Interposer Dummy Structure for Semiconductor Package Warpage Control
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Solution Overview
Problem
The increasing integration of semiconductor chips in semiconductor packages can lead to structural instability and failure of printed circuit boards, necessitating a semiconductor package with an interposer to connect multiple semiconductor chips effectively.
Innovation Solution
A semiconductor package with an interposer that includes a core layer, an upper wiring layer, a dummy structure, and a through via, where the dummy structure is electrically insulated from the through via and provides structural stability by preventing warpage caused by heat and pressure during chip mounting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple semiconductor chips are integrated in a semiconductor package, then the functionality and capacity of the electronic device are improved, but the structural stability deteriorates causing warpage and PCB failure
Solution Approach 1:
An interposer is introduced as an intermediary component between multiple semiconductor chips and the PCB. The interposer includes a core layer with through vias that electrically connect chips to the PCB, while dummy structures within the core layer provide mechanical support to prevent warpage caused by thermal expansion and contraction during operation
Solution Approach 2:
The interposer core layer is constructed as a composite structure combining functional wiring regions with dummy support structures. The dummy structures are made of the same material as the core layer but serve a mechanical reinforcement function rather than electrical function, creating a composite system that simultaneously achieves electrical connectivity and structural stability
2Stability of the object's composition
If the dummy structure is added to the core layer to prevent warpage, then the structural stability is improved, but the device complexity increases
Solution Approach 1:
The dummy structures are merged with the core layer during the same manufacturing process. The dummy structures are formed by depositing additional core layer material in specific regions, then planarizing the surface, so they become an integrated part of the core layer rather than a separate component, thereby reducing overall device complexity while maintaining structural stability
Data Source
AI summary
Disclosed are interposers and semiconductor packages. The interposer includes a core layer, an upper wiring layer on the core layer, a plurality of lower pads on a bottom surface of the core layer, a plurality of through vias that vertically penetrate the core layer and electrically connect the upper wiring layer to the lower pads, and a dummy structure on a lower portion of the core layer. The dummy structure includes a dummy layer whose bottom surface is coplanar with the bottom surface of the core layer, a barrier layer between the core layer and the dummy layer, and a dielectric layer between the core layer and the barrier layer. The dummy structure is horizontally spaced apart and electrically insulated from the through vias.


