Interposer Dummy Thermal Features for HBPoP Underfill Reliability
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Solution Overview
Problem
High-bandwidth package-on-package (HBPoP) semiconductor designs face thermal performance and reliability issues due to extra thermal resistance from the DRAM top package and unprotected solder balls between the interposer and the DRAM top package, which complicates underfilling.
Innovation Solution
Incorporating dummy metal features, such as copper bumps or pillars, on the interposer surrounded by peripheral solder balls, with capillary underfill to enhance thermal performance and reliability by facilitating underfill protection and heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If HBPoP structure is used to achieve high-bandwidth and short signal path, then signal transmission performance is improved, but thermal performance deteriorates due to extra thermal resistance of the DRAM top package
Solution Approach 1:
The patent segments the thermal management function by introducing separate thermal vias and thermal pads distinct from the electrical interconnect structures. This allows independent optimization of thermal pathways without compromising the electrical signal transmission path, thereby resolving the contradiction between high-speed signaling and thermal dissipation.
Solution Approach 2:
The patent introduces an intermediary thermal management layer between the DRAM top package and the interposer, consisting of thermal vias filled with high thermal conductivity material and thermal pads. This intermediary structure provides a dedicated thermal pathway that bypasses the thermal resistance of the DRAM package, allowing heat to be efficiently conducted away without interfering with the electrical signal path.
2Reliability
If peripheral solder balls are used to connect interposer and DRAM top package, then electrical connection is achieved, but reliability deteriorates because solder balls are not protected
Solution Approach 1:
The patent applies preliminary action by pre-forming a gap between the DRAM top package and the interposer before underfill application. This gap is intentionally created to facilitate controlled capillary flow of the underfill material, ensuring complete and uniform protection of the solder balls without requiring complex application processes.
Solution Approach 2:
The patent utilizes capillary action (a hydraulic principle) to automatically draw the underfill material into the gap between the DRAM top package and interposer. The capillary forces drive the underfill to flow uniformly around and protect the solder balls without requiring external pressure or complex application equipment, thus protecting reliability while maintaining simplicity.
3Ease of manufacture
If gap between interposer and DRAM top package is left open, then assembly is simplified, but reliability deteriorates as underfill cannot be filled effectively
Solution Approach 1:
The patent utilizes the gap space as a porous-like structure that facilitates capillary flow of the underfill material. By maintaining an open gap rather than attempting to fill or seal it, the design leverages capillary forces to automatically draw underfill into the space, ensuring complete protection of solder joints while keeping the assembly process simple and avoiding the need for complex filling operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves thermal performance and reliability by allowing effective capillary underfill and heat dissipation, addressing the thermal resistance and protection gaps in HBPoP designs.
Implementation Method 1
A capillary underfill disposed in a gap between the interposer and the top package. The capillary underfill surrounds and protects the peripheral solder balls
Data Source
AI summary
A semiconductor device includes a bottom package, a top package stacked on the bottom package, and an interposer disposed between the bottom package and the top package. The top package is electrically connected to the interposer through a plurality of peripheral solder balls. At least a dummy thermal feature is disposed on the interposer and surrounded by the plurality of peripheral solder balls.