Interposer Dummy Via Layout for Probe-Induced Crack Mitigation

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Solution Overview

Problem

Semiconductor devices experience interposer cracks during probing tests due to mechanical pressure, thermal expansion differences, material defects, and inadequate design reinforcement, leading to reliability issues and potential deformation.

Innovation Solution

Incorporating a reinforced interposer with a dummy via pattern in specified areas, particularly near the edges of top dies, to distribute mechanical stress and thermal expansion mismatch, thereby enhancing the structural integrity and reducing the risk of cracks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If probing test is performed on semiconductor device, then electrical performance verification is achieved, but interposer crack is induced due to mechanical pressure and thermal stress

Engineering Contradiction:

Improveelectrical performance verificationVSAvoidinterposer structural integrity

Core Design Contradiction:

ReliabilityVSStrength

Solution Approach 1:

The patent applies beforehand cushioning by introducing a dummy via structure in the interposer before the probing test is performed. This dummy via acts as a stress-absorbing feature that cushions the interposer against mechanical pressure and thermal stress during subsequent probing operations, preventing crack formation while allowing electrical performance verification to proceed

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

2Ease of manufacture

If molding material with lower rigidity is used to support interposer, then ease of manufacturing is improved, but tensile stress on interposer increases at top-die/molding edge

Engineering Contradiction:

Improvemolding processabilityVSAvoidtensile stress on interposer

Core Design Contradiction:

Ease of manufactureVSStress or pressure

Solution Approach 1:

The patent applies local quality by creating a localized stress-management zone at the top-die/molding edge interface through the dummy via structure. This localized feature addresses the specific problem of tensile stress concentration at the edge while allowing the rest of the molding material to maintain its lower rigidity for ease of manufacturing

Inventive Principle:

Principle #3Local quality

3Reliability

If interposer is reinforced with dummy via pattern, then structural integrity and reliability are improved, but device complexity increases

Engineering Contradiction:

Improveinterposer crack resistanceVSAvoidinterposer structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by modifying the interposer's physical structure through the addition of a dummy via pattern. This structural parameter change increases crack resistance and reliability while keeping the modification relatively simple - essentially adding void spaces in a predictable pattern rather than complex reinforcement structures

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The dummy via pattern effectively mitigates interposer cracks during probing tests, improving the reliability and performance of the package module by distributing mechanical stress and balancing thermal expansion, resulting in reduced warpage and increased manufacturing yield.

Implementation Method 1

the dummy via pattern effectively mitigates interposer cracks during probing tests, improving the reliability and performance of the package module by distributing mechanical stress

Methodology Applied

Scientific EffectStress distribution:

Implementation Method 2

the dummy via pattern effectively mitigates interposer cracks during probing tests, improving the reliability and performance of the package module by distributing mechanical stress and balancing thermal expansion

Methodology Applied

Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS20250014978A1Package module including an interposer with a dummy via, package structure including the package module and methods of forming the same

Publication Date: 2025.01.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A package module includes an interposer including a dummy via formation region having a dummy via, a plurality of semiconductor dies on the interposer, wherein an edge of a semiconductor die in the plurality of semiconductor dies is over the dummy via formation region, and a molding material layer on the interposer encapsulating the plurality of semiconductor dies. A method of making a package module includes forming an interposer including a dummy via formation region having a dummy via, attaching a plurality of semiconductor dies to the interposer, wherein an edge of a semiconductor die in the plurality of semiconductor dies is over the dummy via formation region, and forming a molding material layer on the interposer to encapsulate the plurality of semiconductor dies.