Interposer Embedded Capacitor Structure for Inductive Ringing Reduction

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Solution Overview

Problem

In semiconductor manufacturing, conventional power and ground planes contribute to inductive ringing, increased package size, and the need for discrete capacitors, which hinder the miniaturization of integrated circuit devices and increase costs.

Innovation Solution

An interposer structure with embedded capacitor structures is developed, featuring conductive materials separated by a dielectric material, positioned within openings in the interposer, to minimize inductive path and reduce the need for discrete capacitors, utilizing a process flow that includes forming conductive structures and insulating materials to create capacitors within the interposer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional power and ground planes are used, then electrical connections are established, but inductive ringing occurs and package size increases

Engineering Contradiction:
Improveelectrical connection stabilityVSAvoidinductive ringing
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent transitions from planar power and ground connections to three-dimensional vertical connections through the interposer structure. Power and ground contacts are stacked vertically within the interposer, changing the connection geometry from two-dimensional planes to three-dimensional vertical pathways, thereby reducing inductive loop area and minimizing inductive ringing

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The interposer structure embeds power and ground contacts within its internal volume, nesting multiple conductive elements in a compact vertical arrangement. This nesting approach allows multiple power and ground connections to be integrated within the interposer body, reducing the overall package footprint while maintaining electrical connection reliability

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If conventional power and ground planes are used, then electrical connections are established, but package size and die size increase

Engineering Contradiction:
Improveelectrical connection stabilityVSAvoidpackage size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent utilizes vertical stacking of power and ground contacts within the interposer, transitioning from horizontal planar connections to vertical three-dimensional connections. This dimensional change consolidates multiple connections into a compact vertical space, significantly reducing the horizontal package area required

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The interposer merges power delivery, ground return, and decoupling capacitor functions into a single integrated structure. By combining these previously separate elements into one unified interposer component, the overall package size is reduced while maintaining all necessary electrical connection functions

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If discrete capacitors are used for decoupling, then capacitive decoupling is provided, but device complexity and cost increase

Engineering Contradiction:
Improvecapacitive decouplingVSAvoidnumber of discrete components
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interposer merges the decoupling capacitor function with the power and ground connection structure. Capacitor elements are integrated within the interposer body, combining previously separate discrete components into a single unified structure, thereby reducing device complexity and component count

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The interposer structure performs multiple functions simultaneously: it provides power delivery, ground return, and capacitive decoupling all within a single component. This multi-functionality eliminates the need for separate discrete capacitors and simplifies the overall device architecture

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Object-generated harmful factors

If the number of power and ground lines is increased, then inductive ringing is reduced, but package size increases

Engineering Contradiction:
Improveinductive ringingVSAvoidpackage size
Core Design Contradiction:
Object-generated harmful factorsVSArea of stationary object

Solution Approach 1:

The patent resolves this contradiction by stacking multiple power and ground contacts vertically within the interposer rather than arranging them horizontally. This vertical stacking allows increased number of connections without increasing package area, as the connections occupy vertical space rather than horizontal space

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces the size of integrated circuit devices, minimizes inductive ringing, and eliminates the need for discrete capacitors, thereby enabling smaller, more efficient, and cost-effective semiconductor packaging.

Implementation Method 1

conductive materials separated by a dielectric material

Methodology Applied
Scientific EffectDielectric: Dielectric

Data Source

PatentUS9142427B2Methods of making an interposer structure with embedded capacitor structure
Publication Date: 2015.09.22 MICRON TECHNOLOGY INC
  • US9142427B2 patent drawing
  • US9142427B2 patent drawing
  • US9142427B2 patent drawing

AI summary

A device is disclosed which includes an interposer, at least one capacitor formed at least partially within an opening formed in the interposer and an integrated circuit that is operatively coupled to the interposer. A method is disclosed which includes obtaining an interposer having at least one capacitor formed at least partially within an opening in the interposer and operatively coupling an integrated circuit to the interposer. A method is also disclosed which includes obtaining an interposer comprising a dielectric material, forming an opening in the interposer and forming a capacitor that is positioned at least partially within the opening.