Interposer with Embedded Components for Package-on-Package Stacking
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Solution Overview
Problem
Conventional package-on-package (POP) devices lack an interposer or substrate to provide electrical connections and additional functions between the top and bottom packages, limiting their functionality and efficiency.
Innovation Solution
Incorporating an interposer with embedded components and electric contacts on the substrate, which is electrically connected to both the chip and the substrate, and sealed with molding compound to facilitate interconnections between packages and provide enhanced functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If no interposer is used in conventional POP devices, then the structure is simpler, but the functionality and electrical connection capability are limited
Solution Approach 1:
An interposer substrate is introduced as an intermediary component between the top and bottom packages. This interposer provides additional functionality including embedded components (capacitors, inductors, resistors), electric contacts for electrical connections, and signal routing capabilities that were previously unavailable in direct package-to-package configurations.
2Adaptability or versatility
If solder balls are used for interconnection between packages, then the manufacturing process is established, but the interconnection capability and signal routing options are limited
Solution Approach 1:
The interconnection function is segmented into multiple components: solder balls for mechanical and electrical attachment, substrate traces for signal routing, and embedded components for signal conditioning. This segmentation allows each component to specialize in its function, providing greater interconnection capability while maintaining manageable complexity through functional decomposition.
Solution Approach 2:
The interconnection architecture transitions from a two-dimensional surface-mount approach to a three-dimensional structure with embedded components within the substrate. This adds vertical dimensionality, allowing components to be positioned within the substrate thickness rather than only on surfaces, enabling more compact and flexible interconnection designs.
3Productivity
If packages are stacked directly without interposer, then the total device area is minimized, but the regional efficiency and component density are reduced
Solution Approach 1:
The interposer substrate is nested within the overall package structure, with embedded components positioned within the substrate volume. This nesting approach allows additional functional components to be incorporated within the existing package footprint without significantly increasing the external dimensions, thereby improving component density while maintaining compact form factor.
Data Source
AI summary
A semiconductor package includes a substrate, a chip, an interposer and a molding compound. The chip is electrically connected to the upper surface of the substrate. The interposer is disposed on the chip, and electrically connected to the upper surface of the substrate. The interposer includes an embedded component and a plurality of electric contacts, wherein the embedded component is located between the upper and lower surfaces of the interposer, and the electric contacts are located on the upper surface of the interposer. The molding compound seals the chip and covers the upper surface of the substrate and the lower surface of the interposer.