Interposer Groove Singulation for Faster Semiconductor Packaging

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Solution Overview

Problem

The process of producing semiconductor devices is hindered by the need to change blades for cutting off interposers and sealing materials, which reduces production efficiency.

Innovation Solution

A method involving the use of groove portions in the interposer to expose and cut off the sealing material, eliminating the need for separate blades and optimizing groove formation for efficient production.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If different blades are used for cutting interposer and sealing material, then cutting precision is improved, but production efficiency deteriorates due to blade changing time

Engineering Contradiction:
Improvecutting precisionVSAvoidproduction efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent makes the blade universal by enabling it to cut both the interposer and sealing material effectively. The blade is designed with optimized geometry (edge angle, width, and length) that allows it to perform cutting functions on different materials (interposer and sealing material) without requiring blade replacement, thus achieving multi-functionality while maintaining cutting precision.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of manufacture

If wide groove is formed for cutting-off width, then individualization is improved, but groove formation time increases

Engineering Contradiction:
ImproveindividualizationVSAvoidgroove formation time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The patent divides the groove formation process into multiple sequential passes instead of forming a wide groove in one pass. The blade forms grooves of optimized width (0.05mm to 0.2mm) in multiple steps, gradually creating the necessary grooves for individualization. This segmentation reduces the time required for each pass while achieving the same individualization effect.

Inventive Principle:
Principle #1Segmentation

3Speed

If blade rotates at high speed for cutting, then cutting speed is improved, but blade wear increases

Engineering Contradiction:
Improvecutting speedVSAvoidblade service life
Core Design Contradiction:
SpeedVSDuration of action of stationary object

Solution Approach 1:

The patent optimizes the blade rotation speed to an appropriate range rather than using maximum speed continuously. By controlling the rotation speed within an optimized range and coordinating it with the feed rate, the patent achieves effective cutting while reducing excessive blade wear, thus extending blade service life while maintaining acceptable cutting speed.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Improves production efficiency by reducing the time required for groove formation and minimizing interposer cracking, while maintaining the integrity of the semiconductor device.

Implementation Method 1

polishing the interposer from the second main surface toward the first main surface such that the sealing material disposed in the plurality of groove portions is exposed

Methodology Applied
Scientific EffectMechanical polishing: Abrasion

Data Source

PatentUS20250279393A1Semiconductor device production method and structure
Publication Date: 2025.09.04 RESONAC CORP
  • US20250279393A1 patent drawing
  • US20250279393A1 patent drawing
  • US20250279393A1 patent drawing

AI summary

In this method for producing a semiconductor device, a structure 200 is prepared which includes an interposer 60 in which groove portions 61 divided into a plurality of installation regions 65 is formed and semiconductor elements 202a and 202b arranged on each of the installation regions 65. The semiconductor element 202a is a processor, and the semiconductor element 202a is a memory. Each groove portion 61 includes two parallel grooves 61a. In the structure 200, the semiconductor elements 202a and 202b are sealed such that the sealing material 80b enters each groove 61a. Then, the back surface of the interposer 60 is polished so that the sealing material 80b entering each groove 61a is exposed. Thereafter, the sealing material 80b is cut off along the groove portions 61 to acquire the plurality of semiconductor devices 201.