Interposer Interface for High-Speed Memory Testing
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Solution Overview
Problem
Conventional automatic test equipment struggles to accurately measure high-speed memory devices with operating speeds of 28 Gbps or 40 Gbps due to signal degradation factors such as transmission loss and waveform distortion in existing architectures.
Innovation Solution
An interface device is introduced with a socket printed circuit board and interposers having deformable and non-deformable electrodes, along with FPC cables for direct contact, reducing signal loss and employing pin electronics ICs in a frontend module to minimize transmission distance and suppress high-frequency losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional cable connections are used between test head and DUT, then device complexity is reduced, but measurement precision deteriorates due to signal loss and waveform distortion at high speeds
Solution Approach 1:
An interposer is introduced as an intermediary component between the socket board and the cable connection. The interposer includes a first circuit board with deformable electrodes that contact the socket board, and a second circuit board with non-deformable electrodes that contact the cable. This intermediary structure enables high-speed signal transmission by providing controlled impedance paths and reducing signal degradation, while maintaining the overall system architecture.
Solution Approach 2:
The interface device is segmented into multiple functional components: a socket board for mounting the DUT, an interposer with deformable and non-deformable electrodes for signal transmission, and cable connections. This segmentation allows each component to be optimized for its specific function, with the interposer handling high-speed signals and the cable providing flexible connection, thereby improving measurement precision without excessive overall complexity.
2Loss of energy
If transmission distance is increased to accommodate conventional architecture, then ease of operation is improved, but loss of energy increases due to transmission loss
Solution Approach 1:
The interposer acts as an intermediary that reduces signal loss by providing controlled impedance transmission paths. The deformable electrodes on the first circuit board make reliable contact with the socket board, while the non-deformable electrodes on the second circuit board connect to the cable. This intermediary structure minimizes transmission loss by reducing reflection and distortion, enabling accurate high-speed signal transmission over the necessary distances.
3Speed
If conventional pin electronics mounting is used, then manufacturing precision is maintained, but speed deteriorates due to excessive transmission distance
Solution Approach 1:
The first circuit board of the interposer is designed with deformable electrodes that can elastically deform to make reliable contact with the socket board. This dynamic contact mechanism ensures consistent electrical connection while accommodating manufacturing tolerances. The deformable electrodes compensate for minor misalignments, enabling high-speed signal transmission without requiring extremely tight manufacturing precision.
Solution Approach 2:
The interposer employs different electrode types in different locations: deformable electrodes on the first circuit board for contact with the socket board, and non-deformable electrodes on the second circuit board for cable connection. This local differentiation optimizes each contact interface for its specific requirements, with deformable electrodes providing tolerance compensation at the socket interface and rigid electrodes providing stable connection at the cable interface, thereby achieving high transmission speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables accurate high-speed signal transmission, reducing loss and distortion, allowing for effective testing of devices beyond 20 Gbps.
Implementation Method 1
a first interposer (180) having a first face provided with multiple deformable electrodes (184) and a second face provided with multiple non-deformable electrodes (182)
Data Source
AI summary
An interface device is provided between a test head and a device under test (DUT). A socket board includes sockets each configured to mount a DUT, and a socket PCB having a first face that mounts the sockets and a second face provided with multiple back face electrodes. An interposer has a first face provided with multiple deformable electrodes and a second face provided with multiple non-deformable electrodes and is configured such that the multiple deformable electrodes are in contact with the multiple back face electrodes of the socket PCB. An FPC cable has multiple electrode pads to be coupled with the multiple non-deformable electrodes on the second face of the first interposer.