Interposer-less Multi-chip Module with Base Film Leveling
Solution Overview
Problem
The use of silicon interposers in IC packaging involves complex and costly through silicon via processes and multiple bonding steps, increasing fabrication complexity and production costs.
Innovation Solution
The development of interposer-less multi-chip modules, where a pliable base film is used to level chips of varying thicknesses, eliminating the need for interposers and simplifying the integration process by creating a planar surface for metallization, and forming an interconnect layer with BEOL metal wiring.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon interposers with through silicon via (TSV) process are used to connect chips, then high performance integration of heterogenous IC components is achieved, but fabrication complexity and production costs increase
Solution Approach 1:
The patent extracts and removes the silicon interposer component from the traditional chip packaging system. By eliminating the interposer entirely, the complex TSV fabrication process associated with interposers is removed, while chips are directly mounted onto the package substrate with appropriate underfill materials providing the necessary support and electrical connections.
Solution Approach 2:
The patent merges the functions previously performed by separate components (interposer and substrate) into a simplified direct mounting structure. Chips are directly bonded to the package substrate without an intermediate interposer layer, consolidating the structural and electrical connection functions into a more integrated and simpler assembly process.
2Reliability
If silicon interposers with TSV process are used to connect chips, then high performance integration of heterogenous IC components is achieved, but production costs increase
Solution Approach 1:
The patent extracts and removes the silicon interposer component from the traditional chip packaging system. By eliminating the interposer entirely, the complex TSV fabrication process associated with interposers is removed, while chips are directly mounted onto the package substrate with appropriate underfill materials providing the necessary support and electrical connections.
Solution Approach 2:
The patent replaces expensive silicon interposers with simpler, lower-cost organic substrates or printed circuit board materials. This substitution uses more economical materials that can achieve the same functional requirements at reduced cost, making the overall manufacturing process more cost-effective while maintaining integration performance.
3Reliability
If multiple bonding steps are used to mount chips to Si interposer and then bond interposer to package substrate, then chip integration is achieved, but fabrication complexity and production costs increase
Solution Approach 1:
The patent merges the functions previously performed by separate components (interposer and substrate) into a simplified direct mounting structure. Chips are directly bonded to the package substrate without an intermediate interposer layer, consolidating the structural and electrical connection functions into a more integrated and simpler assembly process.
Solution Approach 2:
The patent employs preliminary preparation of the package substrate surface and chip mounting structures to enable direct bonding. By pre-configuring the substrate with appropriate bonding surfaces, underfill channels, and electrical connection structures, the need for intermediate interposer bonding steps is eliminated, streamlining the overall fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces fabrication complexity and costs by eliminating the need for TSVs and multiple bonding steps, enabling efficient heterogenous integration of chips with varying thicknesses while maintaining a planar surface for metallization.
Implementation Method 1
curing the base film to cross-link the base film
Data Source
AI summary
Interposer-less multi-chip module are provided. In one aspect, an interposer-less multi-chip module includes: a substrate; a base film disposed on the substrate; and chips pressed into the base film, wherein top surfaces of the chips are coplanar. For instance, the chips can have varying thicknesses and are pressed into the base film to different depths such that top surfaces of the chips are coplanar. An interconnect layer having back-end-of line (BEOL) metal wiring can be present on the wafer over the chips. Methods of forming an interposer-less multi-chip module are also provided.