Interposer-Based 3D Microelectronic Assembly for Low-Impedance Interconnects
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Solution Overview
Problem
Conventional through-silicon vias (TSVs) reduce the available space on semiconductor chips for active circuitry, increasing silicon requirements and costs, particularly in compact portable devices where numerous chips with many input/output connections need efficient interconnection with low impedance.
Innovation Solution
A microelectronic assembly using an interposer with a coefficient of thermal expansion less than 10 ppm/°C, featuring conductive elements extending through the interposer to connect microelectronic elements, allowing for reduced chip thickness and efficient heat transfer while maintaining low impedance interconnects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional through-silicon vias (TSVs) are used to provide electrical connections between front and rear chip surfaces, then electrical connectivity is achieved, but the available space on the first face for active circuitry is reduced
Solution Approach 1:
The patent transitions from planar (2D) bond pad arrangements to three-dimensional (3D) stacked architectures with vertical interconnections. By stacking multiple active chips vertically and providing electrical connections between front and rear surfaces through the interposer, the design achieves high-density interconnection while preserving lateral bond pad space for active circuitry.
Solution Approach 2:
The patent introduces an interposer as an intermediary component between stacked microelectronic elements. The interposer provides through-silicon via (TSV) interconnections that penetrate vertically through the assembly, enabling electrical connectivity between front and rear chip surfaces while the bond pads remain on the lateral surfaces of the active chips, thus preserving active circuitry space.
2Volume of moving object
If numerous chips are packed into a small space for compact portable devices, then device compactness is improved, but heat dissipation becomes more difficult
Solution Approach 1:
The interposer serves as a thermal intermediary component with high thermal conductivity, positioned between stacked chips to facilitate heat transfer. The through-silicon via structures in the interposer provide thermal pathways that conduct heat away from the densely packed chips, enabling effective heat dissipation in compact three-dimensional arrangements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables compact, high-density chip arrangements with reduced silicon usage and improved heat transfer, enhancing the performance and efficiency of complex portable devices and data servers by minimizing signal propagation delays and power consumption.
Implementation Method 1
an interposer of a material having a coefficient of thermal expansion less than 10 parts per million/°C
Data Source
Figure 1~2
Figure 1A~3
Figure 4~5
AI summary
A microelectronic assembly (100) can include first and second microelectronic elements (102, 112) each embodying active semiconductor devices adjacent a front surface (104, 114) thereof, and an interposer (120) of a material having a CTE less than 10 ppm/°C. Each microelectronic element (102, 112) can have a conductive pad (106, 116) exposed at the respective front surface (104, 114). The interposer (120) can have a second conductive element (118) extending within an opening (222) in the interposer and exposed at first and second surfaces (227, 229) of the interposer. The first and second surfaces (227, 229) can face the front surface (104, 114) of the respective first and second microelectronic elements (102, 112). Each microelectronic element (102, 112) can include a first conductive element (236, 238) extending within an opening (206, 216) extending from a rear surface (237, 239) towards the front surface (104, 114) of the respective microelectronic element. At least one of the first conductive elements (236, 238) can extend through the conductive pad (204, 214) of the respective first or second microelectronic element (102, 112).