Interposer Substrate Mould for TSV and RDL Formation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces high manufacturing costs due to the need for repeated costly process steps to achieve optimal through-silicon vias (TSV) and redistribution layer (RDL) dimension ratios in 3D stacking technology, which complicates the reduction of device sizes and wiring lengths.
Innovation Solution
A manufacturing method for semiconductor devices using a mould with protrusions and patterns to form interposer substrates, where a thermosetting material is injected, cured, and separated to create conductive pillars and pattern layers without requiring etching or laser processes, simplifying the procedure and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional wire packaging technique and repeated semiconductor process steps are used to achieve TSV and RDL, then optimal dimension ratios can be realized, but manufacturing cost increases significantly
Solution Approach 1:
The mould is designed with protrusions and patterns pre-formed before the injection process. These pre-formed features directly define the TSV holes and RDL patterns in the interposer substrate, eliminating the need for subsequent etching and deposition steps. The preliminary structuring of the mould cavity ensures that when thermosetting material is injected and cured, the optimal dimension ratios for TSV and RDL are achieved automatically without repeated processing.
Solution Approach 2:
The mould acts as an intermediary tool that transfers the pre-defined geometric features (protrusions and patterns) directly onto the thermosetting material to form the interposer substrate. This intermediary process replaces multiple complex semiconductor fabrication steps with a single injection molding operation, maintaining manufacturing precision while dramatically reducing cost and complexity.
2Manufacturing precision
If multiple costly semiconductor process steps are performed repeatedly, then optimal TSV and RDL dimension ratios are achieved, but device size reduction and wiring length reduction are hindered
Solution Approach 1:
The invention merges multiple discrete semiconductor fabrication steps (etching, deposition, patterning, curing) into a single injection molding process. The mould's protrusions and patterns are combined into one tooling element that simultaneously defines both TSV hole locations and RDL patterns, allowing all features to be formed in one operation rather than through repeated sequential steps.
Solution Approach 2:
The mould serves multiple functions: it acts as the injection container, the patterning tool, the TSV formation template, and the RDL definition tool all in one component. This multi-functional approach eliminates the need for separate etching masks, deposition chambers, and patterning tools, thereby reducing device complexity and process steps while maintaining optimal dimension ratios.
3Manufacturing precision
If conventional manufacturing methods are used, then TSV and RDL can be formed, but the process requires etching and laser processes that increase cost and complexity
Solution Approach 1:
The invention replaces the conventional mechanical and chemical systems (etching tools, laser equipment, deposition chambers) with a purely mechanical injection molding system. The protrusions and patterns on the mould mechanically define the TSV and RDL features through direct contact and material displacement during injection, eliminating the need for costly etching and laser processes while maintaining manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies the manufacturing process and reduces costs by defining the shape and thickness of interposer substrates through a mould, eliminating the need for costly etching or laser processes and allowing for efficient electrical connections.
Implementation Method 1
A thermosetting material is injected into the chamber. The thermosetting material is cured.
Data Source
AI summary
A manufacturing method of a semiconductor device is provided. First, a mould is provided. The mould has a chamber, patterns in the chamber, and protrusions in the chamber. A carrier substrate having at least one die located thereon is disposed in the chamber, and the protrusions surround the die. A thermosetting material is injected into the chamber and is cured. The cured thermosetting material is separated from the mould, so as to form an interposer substrate. A plurality of through holes corresponding to the protrusions and a plurality of grooves corresponding to the patterns are formed on the interposer substrate. A conductive material is filled into the through holes and the grooves to form a plurality of conductive pillars and a first conductive pattern layer on a first surface of the interposer substrate. The first conductive pattern layer is electrically connected with the conductive pillars.