Interposer MTP Elements for Secure 3D IC Power Management
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
3D integrated circuits face issues with one-time programmable memory cells due to permanent changes in silicon, which can be easily reverse-engineered, and lack of control over peripheral chips, leading to unnecessary power consumption.
Innovation Solution
An interposer with multiple-time programmable (MTP) elements, such as germanium-antimony-tellurium (GST), is integrated into the circuit, allowing for multiple programming cycles and enabling control over peripheral chips through electrical connections and phase-change materials, enabling efficient programming and power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fused memory cells are used for one-time programming, then programming capability is achieved, but security is compromised due to easy reverse engineering
Solution Approach 1:
The patent changes the material parameter from traditional silicon fuse to phase-change material (GST - germanium antimony telluride), which enables multiple programming cycles by transitioning between amorphous and crystalline states, thereby improving security while maintaining programming capability
Solution Approach 2:
The patent uses a composite structure combining GST phase-change material with silicon substrate, creating an interposer that integrates multiple-time programmable elements with the existing silicon-based transistor circuitry, resolving the contradiction between programming reliability and security
2Reliability
If peripheral chips are always powered up, then operational readiness is maintained, but power consumption increases
Solution Approach 1:
The patent introduces dynamic power management capability through MTP elements that can selectively activate or deactivate peripheral chips based on operational needs, transforming the static always-on state into a dynamic controllable state, thereby reducing power consumption while maintaining operational readiness when needed
Solution Approach 2:
The patent implements a control mechanism where the main controller chip can send commands through the interposer to activate or deactivate peripheral chips based on system requirements, creating a feedback loop that optimizes power consumption while ensuring operational readiness
3Reliability
If multiple-time programmable elements are integrated, then security and power management are improved, but device complexity increases
Solution Approach 1:
The patent introduces an interposer as an intermediary component between the main controller chip and peripheral chips, which houses the MTP elements and control logic. This intermediary approach isolates the complexity within a dedicated component while providing simplified interfaces to the rest of the system, thereby improving security and power management without excessively increasing overall device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The MTP elements allow for secure, multiple programming of memory cells and controlled activation/deactivation of peripheral chips, enhancing security and reducing power consumption by enabling selective activation of chips as needed.
Implementation Method 1
The at least one MTP element comprises germanium-antimony-tellurium ('GST')
Data Source
AI summary
An interposer for an integrated circuit includes a first side and a second side. The interposer includes a substrate and a via disposed in the substrate. A first electrical contact is disposed on the first side. A second electrical contact is disposed on the second side and electrically connected to the via. The interposer also includes a multiple-time programmable (“MTP”) element electrically connected to the first electrical contact and/or the via.