Interposer-Mounted Non-Volatile Memory for Reprogrammable Boot Code
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Solution Overview
Problem
Existing computer systems face limitations in flexibility and post-silicon adaptability for boot code and configuration settings, as boot code stored in onboard ROM is non-modifiable and configuration settings stored in one-time programmable fuses are fixed once programmed, lacking the ability for post-silicon experimentation or error correction.
Innovation Solution
Implementing a non-volatile memory (NVM) to store boot code and configuration settings, which are accessed by an integrated circuit (IC) via an interposer, allowing for reprogrammable and modifiable configurations, eliminating the need for onboard ROM and programmable fuses, and enabling post-silicon changes and error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If boot code is stored in onboard ROM, then the processor can execute boot code during startup, but the boot code cannot be modified after silicon fabrication
Solution Approach 1:
The patent separates the boot code storage from the processor die by placing it on a separate non-volatile memory device mounted on an interposer. This segmentation allows the boot code to be stored externally while maintaining reliable execution, and enables post-silicon modification of the boot code without affecting the processor fabrication.
Solution Approach 2:
The interposer acts as an intermediary component that hosts both the processor and the non-volatile memory device, providing electrical connections between them. This intermediary structure enables the processor to access boot code from external memory while maintaining the reliability of boot execution, and allows for flexible updates to the boot code.
2Ease of manufacture
If configuration settings are stored in one-time programmable fuses, then the settings can be programmed during fabrication, but the settings cannot be changed after programming
Solution Approach 1:
The patent separates configuration storage from the processor die by placing it in a separate non-volatile memory device on the interposer. This allows configuration settings to be programmed during fabrication like traditional fuses, while also enabling post-silicon reprogramming and modification without affecting the processor itself.
Solution Approach 2:
The patent replaces static one-time programmable fuses with dynamic reprogrammable non-volatile memory. This allows configuration settings to be modified multiple times after silicon fabrication, providing adaptability for post-silicon experimentation, error correction, and configuration updates while maintaining the ease of initial programming.
3Adaptability or versatility
If wafer masks are changed to modify boot code, then future processor instances can have updated boot code, but the manufacturing process becomes more complex and costly
Solution Approach 1:
The patent separates boot code storage from the processor fabrication process by placing it in external non-volatile memory on the interposer. This allows boot code to be updated by simply replacing or reprogramming the memory device, eliminating the need to change wafer masks for boot code updates and reducing manufacturing complexity.
Solution Approach 2:
The patent changes the storage medium parameter from fixed ROM integrated into the processor to reprogrammable non-volatile memory on an interposer. This parameter change enables boot code updates through memory reprogramming rather than requiring changes to the semiconductor fabrication masks, significantly simplifying the manufacturing process for future updates.
4Device complexity
If programmable fuses are used on the same die, then configuration settings can be integrated with the processor, but errors cannot be corrected after programming
Solution Approach 1:
The patent separates configuration storage from the processor die while maintaining integration through the interposer. This segmentation allows the use of reprogrammable non-volatile memory that can correct programming errors, while the processor itself remains unchanged and integrated. The interposer provides the necessary electrical connections to maintain system integration.
Solution Approach 2:
The patent replaces static one-time programmable fuses with dynamic reprogrammable non-volatile memory. This allows programming errors to be corrected by reprogramming the memory device, significantly improving reliability while maintaining integration through the interposer connection architecture.
Data Source
AI summary
A method and apparatus for replacing a boot ROM and programmable fuses using a non-volatile memory and an interposer is disclosed. In one embodiment, an apparatus includes an integrated circuit (IC) implementing one or more processor cores. The apparatus further includes a non-volatile memory configured to store configuration settings and boot code for the IC. The apparatus further includes an interposer. Both of the IC and the non-volatile memory are mounted on a substrate of the interposer. The IC and the non-volatile memory are electrically coupled to one another through the substrate. During a system boot, the IC may access boot code and configuration settings from the non-volatile memory via electrical connections in the substrate that are externally inaccessible.