Interposer Semiconductor Package With Stress-Relief Encapsulant Groove

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor packaging technologies face challenges in efficiently integrating multiple dies and interposer structures while ensuring reliable electrical connections and mechanical stability, which affects the reliability and cost-effectiveness of semiconductor devices.

Innovation Solution

The method involves forming an interposer structure with conductive pillars and metallic patterns on a substrate, connecting dies to the interposer through conductive bumps, and encapsulating the assembly with an insulating material that includes a groove to reduce mechanical stress and eliminate the need for underfills, thereby enhancing electrical connectivity and reducing material usage and processing steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple dies and interposer structures are integrated using conventional packaging technologies, then electrical connections and mechanical stability can be achieved, but the integration efficiency is reduced and reliability is compromised

Engineering Contradiction:
ImprovereliabilityVSAvoidintegration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the underfill material function into the encapsulant by forming the encapsulant to directly fill spaces between dies and the interposer structure, eliminating the need for separate underfill application steps and improving integration efficiency while maintaining mechanical stability and electrical connections

Inventive Principle:
Principle #5Merging (Combining)

2Ease of manufacture

If conventional packaging methods are used with separate underfills, then mechanical stability can be maintained, but material usage increases and processing steps are extended

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidmaterial usage
Core Design Contradiction:
Ease of manufactureVSLoss of substance

Solution Approach 1:

The encapsulant is designed to perform multiple functions simultaneously: it encapsulates the interposer structure and dies while also filling the spaces between them, thereby merging the previously separate underfill function into a single material application step that reduces both material usage and processing complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The encapsulant is formulated and positioned to serve multiple purposes: structural support, electrical insulation, mechanical stabilization, and space filling between components, replacing the need for specialized underfill materials and application processes

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If conventional encapsulation without integrated stress reduction features is used, then manufacturing is simpler, but mechanical stress increases affecting reliability

Engineering Contradiction:
Improvemechanical stabilityVSAvoidencapsulant structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The encapsulant is configured with varying properties in different regions: it fills spaces between dies and interposer with specific viscosity and curing characteristics to reduce mechanical stress locally, while maintaining overall structural integrity, thereby improving mechanical stability without requiring complex multi-component systems

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12057359B2Semiconductor package and method of fabricating the same
Publication Date: 2024.08.06 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12057359B2 patent drawing
  • US12057359B2 patent drawing
  • US12057359B2 patent drawing

AI summary

A semiconductor package including a circuit substrate, an interposer structure, a plurality of dies, and an insulating encapsulant is provided. The interposer structure is disposed on the circuit substrate. The plurality of dies is disposed on the interposer structure, wherein the plurality of dies is electrically connected to the circuit substrate through the interposer structure. The insulating encapsulant is disposed on the circuit substrate, wherein the insulating encapsulant surrounds the plurality of dies and the interposer structure and encapsulates at least the interposer structure, the insulating encapsulant has a groove that surrounds the interposer structure and the plurality of dies, and the interposer structure and the plurality of dies are confined to be located within the groove.