Interposer Pillar Array for IC Stack Security and Stress
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Solution Overview
Problem
Stacked integrated circuit systems face challenges in protecting IC die from tampering and reverse engineering, and in managing mechanical stresses and heat dissipation due to thermal expansion mismatches between materials.
Innovation Solution
A stacked integrated circuit system with an interposer layer that includes a patterned array of electrically conductive pillars extending through the interposer layer, which provides electrical connections between IC layers and encapsulates the IC die, reducing mechanical stresses and enhancing security and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If IC die are vertically stacked to save space, then space utilization is improved, but security against tampering and reverse engineering deteriorates
Solution Approach 1:
An interposer layer is introduced between the first and second IC layers, serving as an intermediary substrate that provides secure mounting locations for additional IC die. This interposer with its patterned array of conductive pillars enables controlled electrical connections while physically protecting the IC die from direct access, thereby enhancing security against tampering and reverse engineering while maintaining the compact stacked architecture.
2Area of stationary object
If multiple IC layers are stacked together, then space utilization is improved, but mechanical stress from thermal expansion mismatches worsens
Solution Approach 1:
The interposer layer acts as a mechanical intermediary between IC layers with different thermal expansion coefficients. By positioning IC die on the interposer rather than directly stacking them, the interposer absorbs and distributes thermal stresses, preventing direct stress transmission between mismatched IC layers and reducing the risk of mechanical failure.
Solution Approach 2:
The interposer structure combines multiple materials with different thermal expansion properties to create a composite assembly. This composite structure is designed to accommodate thermal expansion mismatches between different IC layers, distributing thermal stresses throughout the interposer material rather than concentrating them at the IC-IC interfaces.
3Area of stationary object
If IC die are stacked in a compact arrangement, then space utilization is improved, but heat dissipation worsens
Solution Approach 1:
The interposer layer serves as a thermal management intermediary by providing dedicated thermal vias and heat dissipation pathways. Heat generated by IC die mounted on the interposer can be conducted through the interposer substrate and its conductive pillars to external heat sinks, preventing heat accumulation in the compact stacked structure while maintaining space efficiency.
Data Source
AI summary
The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer layer. The interposer layer may include at least one integrated circuit die and an interposer portion that includes a plurality of electrically conductive pillars arranged in a laterally patterned array within the interposer layer.