Interposer Through-Via Layout for High-Density Pillar Conversion
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Solution Overview
Problem
Existing semiconductor device assemblies face challenges in connecting devices with different connector densities, particularly when high-density exposed via pillars need to be connected to those with standard or lower-density connection arrays, and there is a need to test these assemblies while connected to an external device.
Innovation Solution
The use of density-conversion connectors that include substrates with through vias and interconnects to electrically couple semiconductor devices with high-density exposed via arrays to those with lower-density connection structures, allowing for testing via exposed pillars and pads, and utilizing encapsulation methods to secure connections during manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If high-density exposed via pillars are directly connected to standard-density connection arrays, then manufacturing complexity increases and risk of pillar damage during probing increases, but connection density mismatch cannot be resolved
Solution Approach 1:
The patent introduces an interposer substrate as an intermediary component between the high-density semiconductor device and the standard-density external connection array. The interposer includes through-vias that penetrate its thickness, with first surfaces connecting to high-density pillars and second surfaces providing standard-density ball-out connections. This intermediary structure resolves the density mismatch without requiring direct connection between incompatible interfaces.
Solution Approach 2:
The patent utilizes the third dimension (vertical thickness) by creating through-vias that extend through the entire interposer substrate. This allows high-density connections on one surface to be transformed into standard-density connections on the opposite surface, effectively using dimensional transformation to resolve the density compatibility issue.
2Reliability
If high-density pillars are probed for testing, then testing capability is achieved, but risk of damage to pillars increases
Solution Approach 1:
The interposer substrate serves as a protective intermediary that shields the fragile high-density pillars from direct probing. Testing is performed on the robust second surfaces of the interposer through standard ball-out connections, eliminating the need to probe the delicate pillars while maintaining full testing capability.
Solution Approach 2:
The patent establishes testable connections on the interposer's second surfaces before final assembly. The ball-out connections are prepared in advance on the interposer, allowing testing to be performed on these robust connections rather than on the vulnerable pillars during subsequent assembly operations.
3Reliability
If encapsulation is applied to secure connections, then connection reliability improves, but manufacturing process complexity increases
Solution Approach 1:
The patent combines multiple functions into the encapsulation layer: it simultaneously provides mechanical support for the semiconductor device, secures the through-via connections, and creates a protected interface between the high-density pillars and the interposer. This multi-functional integration achieves reliable connections while minimizing additional manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient electrical coupling of semiconductor devices with varying connector densities, facilitating testing and reliable connections while reducing the risk of damage to the pillars during probing, and allowing for the use of standard ball-out configurations for external connections.
Implementation Method 1
individual interconnects may be formed by reflowing tin-silver (SnAg), also known as solder, to connect a pillar to a pad
Data Source
AI summary
A semiconductor device assembly can include a first semiconductor device and an interposer. The interposer can include a substrate and through vias in which individual vias include an exposed portion and an embedded portion, the exposed portions projecting from one or both of the first surface and the second surface of the substrate, and the embedded portions extending through at least a portion of the substrate. The interposer can include one or more test pads, a first electrical contact, and a second electrical contact. The semiconductor device assembly can include a controller positioned on an opposite side of the interposer from the first semiconductor device and operably coupled to the interposer via connection to the second electrical contact.