Interposer Redistribution Layer for Semiconductor Pitch Conversion

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Solution Overview

Problem

The miniaturization of semiconductor chips leads to a pitch mismatch between the chip and the package substrate, hindering effective signal transmission due to limitations in the manufacturing process of package substrates.

Innovation Solution

An interposer with a redistribution layer structure, featuring first and second conductive terminals with different pitches, is used to convert fine pitch configurations on the chip to thick pitch configurations on the package substrate, enabling effective signal transmission by designing the second pitch between adjacent second conductive terminals to be greater than the first pitch between adjacent first conductive terminals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the pitch of conductive terminals on the package substrate is increased to match manufacturing capabilities, then the manufacturing process becomes feasible, but the pitch mismatch with the chip prevents effective signal transmission

Engineering Contradiction:
Improvemanufacturing process feasibilityVSAvoidsignal transmission effectiveness
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces an interposer as an intermediary component between the chip and the package substrate. The interposer contains a redistribution layer structure with first conductive terminals having a first pitch that matches the chip's fine pitch, and second conductive terminals having a second pitch that matches the package substrate's thicker pitch. This intermediary structure enables pitch conversion, allowing the chip to be mounted on the package substrate despite the pitch mismatch, thereby resolving both the manufacturing feasibility issue and the signal transmission effectiveness issue.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If the pitch of conductive terminals on the chip is decreased to increase I/O density, then the number of terminals increases, but the manufacturing process cannot accommodate such fine pitch on the package substrate

Engineering Contradiction:
Improvenumber of I/O terminalsVSAvoidpitch matching capability
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The interposer serves as a pitch conversion intermediary, with its first conductive terminals configured at the fine pitch required for high I/O density connection to the chip, and its second conductive terminals configured at the coarser pitch that the package substrate manufacturing process can accommodate. This allows the system to achieve high terminal density while remaining within manufacturing capabilities.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent resolves the pitch contradiction by introducing a spatial dimension - the interposer is positioned between the chip and the package substrate, creating an intermediate layer where pitch transformation occurs. This dimensional approach allows the system to maintain fine pitch connections at the chip interface while transitioning to coarser pitch at the package substrate interface, effectively decoupling the two pitch requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11862551B2Interposer and semiconductor package each having conductive terminals on redistribution layer with different pitch
Publication Date: 2024.01.02 GLOBAL UNICHIP CORPORATION
  • US11862551B2 patent drawing
  • US11862551B2 patent drawing
  • US11862551B2 patent drawing

AI summary

An interposer, including a redistribution layer structure, first conductive terminals, and second conductive terminals, is provided. The first conductive terminals are disposed on a first surface and are electrically connected to the second conductive terminals. An orthographic projection area of the first conductive terminals on the redistribution layer structure is inside a circuit range outline. There is a first pitch between the adjacent first conductive terminals. The second conductive terminals are disposed on a second surface. An orthographic projection area of a first part of the second conductive terminals on the redistribution layer structure is inside the circuit range outline. An orthographic projection area of a second part of the second conductive terminals on the redistribution layer structure is outside the circuit range outline. There is a second pitch between the adjacent second conductive terminals. The second pitch is greater than the first pitch. A semiconductor package is also provided.