Composite Interposer Power Distribution for Low-Voltage-Drop Packaging
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Solution Overview
Problem
Conventional semiconductor packages experience significant power transmission efficiency deterioration due to the voltage drop each time power passes through a node from the power distribution module to the semiconductor chips, necessitating a new package technology to improve power transmission efficiency and control response time.
Innovation Solution
A semiconductor package design featuring a power distribution structure with a power distribution module and surface mounting device integrated into a composite interposer, which includes a redistribution structure between the semiconductor chips and the substrate, along with conductive posts and molding material to reduce the power transmission path and parasitic resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the power distribution module is disposed on the substrate and power is transmitted through the substrate and interposer, then the conventional package structure is maintained, but the voltage decreases significantly at each node resulting in poor power transmission efficiency
Solution Approach 1:
The patent transitions the power distribution module from a planar substrate-based layout to a three-dimensional structure where the PDM is disposed on a support substrate with conductive posts extending vertically to connect with semiconductor chips. This vertical dimensionality change shortens the power transmission path and eliminates the need for power to traverse through the substrate and interposer, thereby reducing voltage drop and improving power transmission efficiency.
Solution Approach 2:
The patent introduces a support substrate as an intermediary structure that carries the power distribution module and provides vertical conductive posts for direct power connection to semiconductor chips. This intermediary structure mediates between the power source and the chips, enabling direct power transmission without relying on the substrate and interposer, thus resolving the voltage drop issue while maintaining package functionality.
2Loss of time
If the power distribution module is disposed on the substrate with long transmission paths, then the conventional package structure is maintained, but the control response time deteriorates due to parasitic resistance
Solution Approach 1:
The patent employs vertical conductive posts extending from the support substrate to directly connect the power distribution module with semiconductor chips, creating a short and direct power transmission path. This vertical arrangement eliminates the long horizontal transmission paths through substrate and interposer, reducing parasitic resistance and improving control response time while enhancing power distribution reliability.
3Productivity
If the power distribution module is integrated directly with semiconductor chips, then the power transmission path is shortened, but the manufacturing process becomes more complex
Solution Approach 1:
The patent segments the power distribution system into distinct functional modules: a support substrate for structural support, a power distribution module for power management, and vertical conductive posts for power transmission. This segmentation allows each component to be manufactured and optimized independently using existing semiconductor fabrication techniques, then integrated together, thereby achieving direct power connection benefits without excessive manufacturing complexity.
Solution Approach 2:
The support substrate serves multiple functions: providing mechanical support for the power distribution module, serving as a platform for mounting the PDM, and providing vertical conductive paths for power transmission. This multi-functionality consolidates several components into one, simplifying the overall manufacturing process while achieving the goal of direct power connection to semiconductor chips.
Data Source
AI summary
A semiconductor package according to an embodiment includes an interposer including a power distribution structure, and a redistribution structure on the power distribution structure; a first semiconductor die on the interposer; and a second semiconductor die on the interposer, wherein the power distribution structure may include a power distribution module connected to the bottom surface of the redistribution structure; a plurality of conductive posts connected to the bottom surface of the redistribution structure; and a molding material for molding the power distribution module and the plurality of conductive posts.