Interposer Package Layout With Separate Power and Signal Channels
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Solution Overview
Problem
Power supply interference with signals in wafer-level packaging leads to logic errors, significantly reducing overall voltage and power consumption.
Innovation Solution
A package structure with an interposer, logic chip structure, and signal channel structure, where the power supply layer is connected through a conductive structure and the signal layer is connected through the interposer and signal channel structure, maintaining separate pathways for power supply and signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If power supply and signal transmission share the same channel structure in wafer-level packaging, then device integration density is improved, but signal interference occurs leading to logic errors and reduced power consumption
Solution Approach 1:
The patent divides the channel structure into separate power supply channels and signal transmission channels. The power supply channel structure includes power supply electrodes and signal channel structures include signal electrodes, creating physically separated pathways for power and signals to eliminate interference while maintaining high integration density through coordinated arrangement on the wafer substrate.
Solution Approach 2:
The patent introduces an interposer structure as an intermediary component between the logic chip and external connections. The interposer contains through-electrodes that provide dedicated power supply pathways and signal pathways, acting as a mediator that separates power and signal routes while enabling high-density interconnection through its substrate structure.
2Reliability
If separate channel structures are used for power supply and signal transmission, then signal interference is reduced, but device structure complexity increases
Solution Approach 1:
The patent merges the power supply channel structure and signal channel structure into a single integrated wafer-level package substrate. Both types of channels are fabricated using the same base structure of electrodes and conductive pathways on the interposer, reducing overall structural complexity while maintaining functional separation for reliable signal transmission.
Solution Approach 2:
The interposer substrate serves multiple functions simultaneously: it provides mechanical support, electrical interconnection through through-electrodes, thermal management pathways, and routing for both power supply and signal transmission. This multi-functionality reduces the need for separate dedicated structures, simplifying the overall device complexity while ensuring reliable separate channels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the likelihood of crosstalk and logic errors, leading to improved performance by minimizing power supply interference with signals and reducing overall voltage and power consumption.
Implementation Method 1
the power supply layer of the logic chip is close to the power supply channel structure and is electrically connected to a corresponding conductive structure through the power supply channel structure to realize power supply
Implementation Method 2
the signal layer of the logic chip is close to the interposer and is connected to the corresponding conductive structure through the interposer and the signal channel structure to establish a signal connection to realize signal transmission
Data Source
AI summary
A package structure and a related preparation method thereof are disclosed. The package structure includes: an interposer; and a logic chip structure and a signal channel structure that are located on a surface of the interposer, where the logic chip structure includes a logic chip on a surface of the interposer and a power supply channel structure on a surface of the logic chip. A power supply layer of the logic chip is close to the power supply channel structure, which is electrically connected to a corresponding conductive structure to achieve power supply. A signal layer of the logic chip is close to the interposer and connected to the corresponding conductive structure to realize signal transmission. In this way, the power supply does not interfere with signals, and a logic error is avoided; and an overall voltage and power consumption of a finished package is significantly reduced.