Interposer Redistribution Layer for Mixed-Size Die Packaging
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Solution Overview
Problem
The semiconductor industry faces challenges in packaging dies with different sizes of connectors, which complicates manufacturing and increases costs, especially when using interposers with through-silicon vias (TSVs) that are expensive.
Innovation Solution
The use of an interconnect substrate without TSVs, made from lower-cost materials like silicon, gallium arsenide, or bismaleimide triazine resin, with redistribution layers and conductive structures formed through plating and reflow processes to create bonding structures of varying sizes for efficient electrical connection and heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interposers with through-silicon vias (TSVs) are used to package dies with different connector sizes, then electrical connection and heat dissipation are improved, but manufacturing cost increases significantly
Solution Approach 1:
The patent extracts the TSV structure from the interposer and replaces it with a planar redistribution layer architecture. The interposer becomes a flat substrate with conductive traces distributed across its surface, eliminating the need for vertical through-silicon vias while maintaining electrical connectivity between dies of different sizes.
Solution Approach 2:
The patent employs lower-cost materials for the interposer substrate, such as organic substrates or glass, replacing expensive silicon-based TSV interposers. This substitution reduces manufacturing costs while still providing the necessary electrical and thermal performance for packaging applications.
2Temperature
If interposers with through-silicon vias (TSVs) are used to package dies with different connector sizes, then heat dissipation performance is improved, but manufacturing complexity increases
Solution Approach 1:
The patent removes the complex three-dimensional TSV structure and replaces it with a two-dimensional planar redistribution layer system. This simplifies the manufacturing process by eliminating the need for deep drilling, plating, and alignment operations required for TSVs, while maintaining thermal management capabilities through the planar conductive network.
Solution Approach 2:
The patent transitions from vertical heat dissipation through TSVs to lateral heat dissipation through planar redistribution layers. Thermal energy is conducted across the surface of the interposer through distributed conductive traces, providing effective heat management without the manufacturing complexity of vertical via structures.
3Adaptability or versatility
If redistribution layers with varying connector sizes are implemented, then adaptability to different die sizes is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent implements redistribution layers with locally varied conductor geometries on the interposer substrate. Different regions of the interposer have conductive traces configured to match the specific connector sizes and patterns of attached dies, allowing adaptation to various die sizes while using a single planar manufacturing process that maintains consistent precision requirements across the entire substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs by eliminating the need for expensive TSVs, enabling efficient packaging of dies with different connector sizes while maintaining effective electrical and thermal performance.
Implementation Method 1
a conductive layer is plated over the exposed regions
Implementation Method 2
The solder layer is reflowed to form bonding structures
Data Source
AI summary
A semiconductor package includes a package substrate. A redistribution structure is bonded to the package substrate. A bottommost surface of the redistribution structure is lower than a topmost surface of the package substrate. A conductive connector electrically couples the redistribution structure to the package substrate. The conductive connector physically contacts a sidewall of the redistribution structure. A first integrated circuit die is bonded to the redistribution structure through first bonding structures and is bonded to the package substrate through second bonding structures. The first bonding structures and the second bonding structures have different sizes.