Interposer Dice Scribe Lane Width for Thermal Warping Control
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Solution Overview
Problem
Interposers used in semiconductor structures tend to warp during assembly due to differences in thermal expansion coefficients between silicon and metal routing layers, leading to improper solder ball connections and potential short circuits.
Innovation Solution
Incorporating wider scribe lanes around interposer dice on a semiconductor wafer, with widths of at least 2.5% of the die width, and optionally using stiffening structures in these lanes to provide additional rigidity and resist thermal stresses during reflow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If standard scribe lane widths are used during interposer fabrication, then manufacturing efficiency and die density are improved, but warping occurs during reflow due to thermal expansion differences between silicon and metal routing layers
Solution Approach 1:
The patent applies preliminary anti-action by designing scribe lanes with widths of at least 2.5% of the interposer die width to preemptively counteract the warping forces that will occur during reflow. The scribe lanes are engineered with sufficient width to provide mechanical resistance against the thermal expansion stresses before the warping actually occurs, thereby preventing improper solder ball connections and short circuits.
2Stability of the object's composition
If scribe lane width is increased to prevent warping, then interposer stability during reflow is improved, but manufacturing efficiency and die density deteriorate
Solution Approach 1:
The patent applies parameter changes by optimizing the scribe lane width to a specific threshold of at least 2.5% of the interposer die width. This parameter optimization balances the competing requirements: providing sufficient width to resist warping during reflow while minimizing the impact on die density and manufacturing efficiency. The specific percentage threshold represents an optimized balance point.
3Ease of manufacture
If conventional interposer design is used, then manufacturing process is simple, but solder ball connections fail during reflow due to warping
Solution Approach 1:
The patent applies preliminary anti-action by incorporating scribe lanes with widths of at least 2.5% of the interposer die width into the manufacturing process. This design feature preemptively counteracts the warping that would otherwise occur during reflow, ensuring that solder ball connections remain reliable without adding complex manufacturing steps or processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The wider scribe lanes and stiffening structures effectively inhibit warping of interposer dice during assembly, ensuring proper solder ball connections and preventing short circuits by providing resistance to lateral stresses from thermal expansion.
Implementation Method 1
Due to differences in the coefficients of thermal expansion between the silicon body and the metal routing layer, and also due to film stresses generated during silicon layer processing, interposers have a tendency to warp during package assembly. When the interposer is heated to reflow solder joints of a die contact array, wiring in the metal routing layer expands faster than the silicon.
Data Source
AI summary
In one or more embodiments, a semiconductor structure is provided that includes a plurality of interposer dice on an un-singulated segment of a semiconductor wafer. Scribe lanes circumscribing each of the plurality of interposer dice have widths of at least 2.5% of the width of each interposer die. Each interposer die includes a first contact array formed on a first side of the interposer die, a plurality of vias formed through the interposer die, one or more wiring layers formed on the first side of the interposer die and electrically coupling the first contact array to the plurality of vias, and a second contact array formed on a second side of the interposer die and electrically coupled to the plurality of vias.