Interposer Shield Layer for Signal Integrity and EMI Reduction
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Solution Overview
Problem
Conventional TSV interposers experience signal attenuation and interference leakage due to electromagnetic field penetration from signal transmission structures into the silicon substrate, limiting the integration and performance of semiconductor devices.
Innovation Solution
An interposer design featuring a substrate with through silicon vias, a conductive shield layer, insulation layers, and cable layout layers, where the shield layers are strategically positioned to block and reflect electromagnetic waves, reducing penetration and maintaining signal integrity while providing a return current path without the need for additional ground planes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional TSV interposer uses TSV ground for signal transmission, then the structure is simple, but electromagnetic field penetrates into the silicon substrate causing signal attenuation and interference leakage
Solution Approach 1:
The patent introduces a shield layer as an intermediary component between the signal transmission structure and the silicon substrate. This shield layer acts as a mediator that blocks electromagnetic field penetration while maintaining signal integrity, resolving the contradiction between simple structure and signal reliability.
Solution Approach 2:
The patent extracts the ground function from the traditional TSV ground structure and separates it into a dedicated shield layer. This extraction allows the shield layer to specifically address electromagnetic interference without being constrained by the original TSV ground design, improving signal integrity while managing structural complexity.
2Reliability
If additional ground planes are added to block electromagnetic field penetration, then signal integrity improves, but the number of layers in cable layout increases
Solution Approach 1:
The shield layer is designed to perform multiple functions simultaneously: it provides electromagnetic field blocking, serves as a reference plane for signal transmission, and offers a return current path. This multi-functionality allows the interposer to maintain signal integrity without adding excessive layer complexity.
Solution Approach 2:
The patent merges the shielding function with the existing interposer substrate structure by integrating the shield layer into the cable layout. This merging approach allows the shield layer to fulfill its electromagnetic blocking role while being part of the overall cable layout structure, rather than adding completely separate ground planes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The interposer effectively reduces signal loss and electromagnetic interference, enhancing signal integrity and reducing the number of layers in the cable layout, thereby improving the performance and packaging density of semiconductor devices.
Implementation Method 1
a first shield layer, where the first shield layer is disposed on the upper surface of the interposer substrate and the first shield layer has electrical conductivity
Implementation Method 2
the first shield layer is disposed between the upper surface of the interposer substrate and the first cable layout layer and is configured to block and reflect an electromagnetic wave generated at the first cable layout layer
Implementation Method 3
a first cable layout layer, where the first cable layout layer is disposed at the first insulation layer and is electrically connected to one or more through silicon vias of the at least one through silicon via
Data Source
AI summary
The present application provides an interposer, including an interposer substrate, at least one through silicon via, a first shield layer, a first insulation layer, a first cable layout layer, and at least one first bump. The interposer substrate includes an upper surface and a lower surface; the at least one through silicon via is buried in the interposer substrate and runs through the upper surface and the lower surface; the first shield layer is disposed on the upper surface of the interposer substrate and the first shield layer has electrical conductivity; the first insulation layer is disposed at the first shield layer; the first cable layout layer is disposed at the first insulation layer and is electrically connected to the at least one through silicon via.