Interposer for Stacked IC Packages with Encapsulated Conductive Elements
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Solution Overview
Problem
Current package-on-package designs face challenges in electrically connecting stacked integrated circuit packages due to large through mold conductive via pitches, which increase space requirements and susceptibility to stress damage from warpage during fabrication and operation.
Innovation Solution
The use of an interposer with discrete conductive elements encased in an encapsulant material, where bond wires extend between interconnection pads on the substrates, providing a compact and robust electrical connection between stacked integrated circuit packages, reducing the need for large via pitches and minimizing stress damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through mold conductive vias are used to electrically connect stacked packages in package-on-package designs, then electrical connection between packages is achieved, but the required via pitches are relatively large which increase space requirements and make the package larger
Solution Approach 1:
The patent introduces an interposer as an intermediary component between the first and second packages. The interposer contains conductive elements that extend into openings in the second package substrate, providing electrical connection without requiring large through mold vias in the packages themselves. This mediator approach allows compact via pitches while maintaining reliable electrical connection.
Solution Approach 2:
Instead of creating horizontal electrical connections through large pitch vias at the package level, the patent moves the connection mechanism to the vertical dimension by extending conductive elements through openings in the second substrate. This dimensional shift enables smaller footprint while achieving the same electrical connection function.
2Reliability
If through mold conductive vias are formed at the periphery of package-on-package designs, then electrical connection is achieved, but the vias are susceptible to stress damage due to warpage during fabrication and operation
Solution Approach 1:
The interposer acts as a stress-isolating intermediary that decouples the electrical connection function from the package periphery where warpage-induced stress is highest. The conductive elements extend into the interior region of the second substrate, away from stress-concentrated peripheral areas, thereby protecting the electrical connection from warpage damage.
Solution Approach 2:
The patent proactively addresses warpage stress by positioning conductive elements in regions less susceptible to stress damage before fabrication and operation proceed. The openings and conductive elements are configured in advance to avoid high-stress peripheral zones, preventing stress damage before it occurs rather than attempting to mitigate it afterward.
3Ease of manufacture
If larger through mold conductive via pitches are used to accommodate high Z-height package-on-package designs, then fabrication is simplified, but greater space is demanded within the package which counteracts the goal of making smaller packages
Solution Approach 1:
The interposer serves as a manufacturing-friendly intermediary that absorbs the complexity of precise via alignment and formation. By placing conductive elements in the interposer and extending them into openings in the second substrate, the design achieves compact dimensions without sacrificing fabrication ease, as the interposer can be prepared independently with standard via technologies.
Data Source
AI summary
An integrated circuit structure may be fabricated having a first integrated circuit package comprising a first integrated circuit device electrically attached to a first surface of a first substrate, a second integrated circuit package comprising a second integrated circuit device electrically attached to a first surface of a second substrate and an opening extending between a first surface of the second substrate and the second surface of the second substrate, and an interconnection structure electrically attached to the first surface of the first substrate, wherein a portion of the interconnection structure extends into the second substrate opening and wherein the interconnection structure is electrically attached to a first surface of the second substrate.