Interposer Substrate Cavities for Semiconductor Package Molding
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Solution Overview
Problem
Semiconductor packages face issues with void formations and bleeding of molding compound during the molding process, which affect reliability and yield due to the limited flow of the molding compound through narrow regions between integrated circuit devices and substrates.
Innovation Solution
Incorporating cavities in the upper substrate over integrated circuit devices and extension members or recesses on the exterior surface to facilitate the flow of the molding compound, reducing void formations and bleeding by creating a wider pathway for the encapsulation material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the molding compound flows through narrow regions between integrated circuit devices and substrates, then the encapsulation is completed, but void formations occur due to limited flow
Solution Approach 1:
The upper substrate is segmented by forming cavities (first cavity over the integrated circuit device, second cavity over the internal interconnects) that divide the encapsulation space into distinct regions. This segmentation allows the molding compound to flow through separate pathways, preventing void formations by eliminating narrow restricted regions where air bubbles could become trapped.
Solution Approach 2:
The solution introduces vertical dimensionality by forming cavities that extend into the upper substrate at different locations. The first cavity extends from the first surface and the second cavity extends from the second surface, creating three-dimensional flow pathways that allow the molding compound to bypass narrow regions and fill the encapsulation space completely without trapping voids.
2Reliability
If the molding compound is applied to encapsulate the package, then the integrated circuit device is protected, but bleeding of molding compound occurs between adjacent packages
Solution Approach 1:
Extension members are formed at the peripheral regions of the upper substrate where bleeding is most likely to occur. These extension members create localized barriers that prevent molding compound from spreading between adjacent packages, while the rest of the substrate maintains its normal encapsulation function. This local modification addresses the bleeding issue without affecting the overall protection capability.
Solution Approach 2:
The extension members act as intermediary structures between the upper substrate and adjacent packages. They form a physical barrier that mediates the interaction between the molding compound and the boundaries of adjacent packages, preventing the compound from bleeding over while allowing the encapsulation to proceed normally within the package boundaries.
3Ease of operation
If the cavity is formed over the integrated circuit device, then the molding compound flow is facilitated, but the internal interconnects may be exposed
Solution Approach 1:
The cavity structure is segmented into two separate cavities: the first cavity formed over the integrated circuit device region and the second cavity formed over the internal interconnects region. This segmentation ensures that each cavity is positioned to facilitate flow in its specific area while the second cavity specifically protects the internal interconnects from exposure, maintaining both flow facilitation and interconnect coverage.
Data Source
AI summary
Semiconductor packages with multiple substrates can incorporate cavities in a portion of an upper substrate to minimize or reduce void formations during a molding process. The cavities can be formed substantially over the integrated circuit devices and not over the internal interconnects to further facilitate the flow of the molding compound. The combination with extension members or recesses on a top or exterior surface of the upper substrate can further cut down on bleeding or spill over of the molding compound between adjacent packages and improve device reliability and yield.