3D IC Interposer Testing Structures for Fault Detection

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Solution Overview

Problem

Current 3D IC package systems lack testing structures for redistribution layers (RDL) and through-silicon-via (TSV) structures, leading to potential failures and waste of good silicon dies if a faulty interposer is bonded with them.

Innovation Solution

Incorporating testing structures and methods for silicon interposers, including probe pads and metallic lines within the RDL and TSV structures, to enable electrical testing of connections between bumps and TSVs, ensuring the integrity of the interposer before assembly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If testing structures are not incorporated into the interposer, then the interposer structure remains simple and manufacturing is easier, but faulty interposers cannot be detected before assembly, leading to waste of good silicon dies and failed package systems

Engineering Contradiction:

Improvedetection of faulty interposerVSAvoidinterposer structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements testing structures (probe pads and test circuits) on the interposer that enable electrical testing to be performed before the interposer is assembled with silicon dies. This preliminary testing capability allows faulty interposers to be identified and discarded prior to assembly, preventing waste of good silicon dies while maintaining a relatively simple interposer structure.

Inventive Principle:

Principle #10Preliminary action

2Difficulty of detecting and measuring

If electrical testing capability is added to the interposer, then faulty connections can be detected, but the interposer design and manufacturing become more complex

Engineering Contradiction:

Improveelectrical connection testingVSAvoidinterposer fabrication

Core Design Contradiction:

Difficulty of detecting and measuringVSEase of manufacture

Solution Approach 1:

The patent integrates testing structures (probe pads, test circuits) with the existing interposer fabrication process. The testing structures are formed using the same semiconductor manufacturing steps as the interposer itself, merging the testing capability into the standard fabrication flow rather than requiring separate, complex assembly processes.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The interposer is designed to serve multiple functions: it provides mechanical support, electrical interconnection between silicon dies, and integrated electrical testing capability. The testing structures share common elements with the functional interposer structures, allowing a single component to fulfill multiple roles without proportionally increasing complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS9704766B2Interposers of 3-dimensional integrated circuit package systems and methods of designing the same

Publication Date: 2017.07.11 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

An interposer of a package system includes a first probe pad disposed adjacent to a first surface of the interposer. A second probe pad is disposed adjacent to the first surface of the interposer. A first bump of a first dimension is disposed adjacent to the first surface of the interposer. The first bump is electrically coupled with the first probe pad. A second bump of the first dimension is disposed adjacent to the first surface of the interposer. The second bump is electrically coupled with the second probe pad. The second bump is electrically coupled with the first bump through a redistribution layer (RDL) of the interposer.