Interposer with Through Vias for Chip Interconnect

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Solution Overview

Problem

The miniaturization of consumer electronic devices leads to increased difficulty and complexity in wiring between chips due to reduced distances, resulting in electromagnetic interference.

Innovation Solution

An interposer with a connective substrate and through vias is used to electrically connect multiple chips, reducing the package size and area by facilitating signal transmission between flip-chip components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the distance between chips is reduced to decrease package area, then the area of the package is reduced, but the wiring difficulty and electromagnetic interference increase

Engineering Contradiction:
Improvepackage areaVSAvoidwiring complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

An interposer substrate is introduced as an intermediary component between multiple chips. The interposer provides a centralized connection point with multiple contact pads that can be wirelessly connected to chips, eliminating the need for direct complex wiring between closely spaced chips. This mediator structure simplifies the wiring architecture while enabling compact chip arrangement.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Area of stationary object

If the distance between chips is reduced to decrease package area, then the area of the package is reduced, but electromagnetic interference between chips increases

Engineering Contradiction:
Improvepackage areaVSAvoidelectromagnetic interference
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The interposer substrate acts as an electromagnetic shielding intermediary, physically separating the signal paths between chips. By routing connections through the interposer rather than directly between chips, the structure reduces electromagnetic coupling and interference while maintaining compact form factor.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If conventional wiring methods are used between closely spaced chips, then signal transmission is achieved, but the wiring process becomes difficult and complex

Engineering Contradiction:
Improvesignal transmissionVSAvoidwiring process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The connection architecture is segmented into two independent stages: (1) chip-to-interposer connections using simplified wire bonds, and (2) interposer-to-chip connections on the other side. This segmentation transforms a single complex wiring task into two simpler, more manageable wiring tasks that can be performed with standard processes.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7987588B2Interposer for connecting plurality of chips and method for manufacturing the same
Publication Date: 2011.08.02 ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC
  • US7987588B2 patent drawing
  • US7987588B2 patent drawing
  • US7987588B2 patent drawing

AI summary

The invention discloses an interposer used for connecting a plurality of chips. The interposer includes a connective substrate and at least a through via disposed in the connective substrate. The connective substrate has a first surface and a second surface. The through via acts as a connector, and is electrically connected to the first surface and the second surface. The first surface and the second surface are electrically connected to at least a first chip and a second chip respectively. In addition, the first chip and the second chip are electrically connected by the through via.