Active Interposer Translation Circuitry for Chiplet Protocol Compatibility

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

The integration of multiple electronic chips or chiplets with different communication protocols in data processing systems faces challenges due to design overhead, increased power consumption, and longer time to market, as existing solutions require protocol translation circuitry within each chip, which adds size and complexity.

Innovation Solution

Implementing translation circuitry within an active interposer or interconnect bridge between chiplets allows for data translation across different protocols, accommodating physical, encoding, and timing differences, thereby reducing power consumption and enabling faster design and market release of chiplets without requiring protocol flexibility within each chiplet.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If protocol translation circuitry is implemented inside each chip, then communication compatibility between different protocols is achieved, but chip size and design complexity increase

Engineering Contradiction:

Improveprotocol compatibilityVSAvoidchip design complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces an interposer as an intermediary component between chips with different protocols. The interposer contains translation circuitry that mediates communication between incompatible protocols, allowing chips to maintain their native protocols while achieving compatibility through the intermediary translation layer.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the protocol translation function from the chip itself and places it in a separate interposer component. This segmentation allows each chip to remain simple while the translation functionality is distributed to the interposer, reducing individual chip complexity.

Inventive Principle:

Principle #1Segmentation

2Adaptability or versatility

If protocol translation circuitry is implemented inside each chip, then communication compatibility between different protocols is achieved, but power consumption increases

Engineering Contradiction:

Improveprotocol compatibilityVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The interposer acts as a power-efficient intermediary by consolidating translation circuitry in a dedicated component rather than duplicating it in each chip. This allows for more efficient power management of the translation function and reduces the total power consumption across the system.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Adaptability or versatility

If protocol translation circuitry is implemented inside each chip, then communication compatibility between different protocols is achieved, but time to market increases

Engineering Contradiction:

Improveprotocol compatibilityVSAvoidtime to market

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

By segmenting the translation functionality into a separate interposer, chip design and fabrication can proceed independently and in parallel with interposer development. This segmentation eliminates the need to wait for all chips to be configured with translation circuitry before releasing the package.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The interposer can be designed and prepared in advance with the necessary translation circuitry, allowing chips to be fabricated and tested with their native protocols before final assembly. This preliminary preparation of the translation infrastructure accelerates the overall time to market.

Inventive Principle:

Principle #10Preliminary action

4Adaptability or versatility

If protocol translation circuitry is implemented inside each chip, then communication compatibility between different protocols is achieved, but chip size increases

Engineering Contradiction:

Improveprotocol compatibilityVSAvoidchip area

Core Design Contradiction:

Adaptability or versatilityVSArea of moving object

Solution Approach 1:

The interposer serves as a physical intermediary that hosts the translation circuitry, allowing chips to maintain their original, smaller sizes without integrated translation circuitry. The translation functionality is relocated to the interposer, preserving chip real estate for core functionality.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11669472B2Frequency translation circuitry for an interconnection in an active interposer of a semiconductor package

Publication Date: 2023.06.06 ALTERA CORP

AI summary

Systems and method include one or more die coupled to an interposer. The interposer includes interconnection circuitry configured to electrically connect the one or more die together via the interposer. The interposer also includes translation circuitry configured to translate communications as they pass through the interposer. For instance, in the interposer, the translation circuitry translates communications, in the interposer, from a first protocol of a first die of the one or more die to a second protocol of a second die of the one or more die.