Interposer Package Underfill Breaks to Reduce Warpage
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Solution Overview
Problem
The semiconductor industry faces challenges in bonding integrated circuit chips directly onto substrates due to increased integration density and warpage issues during high-temperature processing, which limits the ability to form three-dimensional packages with asymmetric or arbitrary device layouts.
Innovation Solution
The method involves attaching integrated circuit devices to an interposer with dams formed between them, dispensing an underfill material, and removing the dams to create underfill breaks, which reduces warpage and allows for the formation of underfill breaks in asymmetric packages by preventing the underfill from being a single continuous layer, thereby reducing thermal mismatch and cracking risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If integrated circuit devices are bonded directly onto a substrate, then the bonding process is simple, but warpage occurs during high-temperature processing and three-dimensional packaging with asymmetric layouts cannot be achieved
Solution Approach 1:
An interposer is introduced as an intermediary substrate between the integrated circuit devices and the final package substrate. The interposer has a different thermal expansion coefficient and mechanical properties that compensate for warpage during high-temperature processing, enabling reliable bonding while maintaining the ability to form three-dimensional asymmetric packages.
Solution Approach 2:
The packaging system is segmented into multiple components: integrated circuit devices, an interposer, and a package substrate. This segmentation allows each component to be optimized independently for its specific function, with the interposer specifically designed to handle thermal and mechanical stress during processing.
2Ease of manufacture
If underfill material is applied as a single continuous layer, then the application process is simple, but thermal mismatch and cracking risks increase in asymmetric packages
Solution Approach 1:
The underfill material application is segmented into discrete portions applied in the gaps between adjacent integrated circuit devices rather than as a single continuous layer. This segmentation reduces thermal mismatch and cracking risks in asymmetric packages while maintaining ease of application through standardized gap-filling processes.
3Productivity
If integration density is increased through repeated reductions in minimum feature size, then more components can be integrated into a given area, but the area occupied by integrated components decreases and direct bonding becomes difficult
Solution Approach 1:
The interposer enables three-dimensional packaging arrangements, allowing integrated circuit devices to be stacked or arranged in asymmetric layouts rather than being constrained to a single planar layer. This dimensional transition accommodates high integration density while maintaining bonding capability through redistributed ball contacts on the interposer.
Data Source
AI summary
In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.