Interposer Circuit for Direct Virtual Interrupt Injection

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Solution Overview

Problem

In virtualized computer systems, the injection of virtual interrupts through a hypervisor is costly in terms of latency and performance due to the need for hypervisor intervention, especially when interrupt controllers like GICv3 do not support direct injection.

Innovation Solution

An interposer circuit is used between the processor core and the interrupt controller to manipulate commands and responses, enabling direct injection of virtual interrupts by converting physical interrupts into virtual ones without hypervisor intervention, using an interposer circuit to decode and modify interrupt identifiers and flags.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If virtual interrupts are injected through the hypervisor, then the interrupt can be delivered to the guest, but the latency is high and system performance deteriorates

Engineering Contradiction:
Improveinterrupt delivery capabilityVSAvoidinterrupt latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

An interposer circuit is introduced as an intermediary component between the interrupt controller and the processor core. This interposer captures interrupt commands from the interrupt controller, converts them into virtual interrupt commands, and directly injects them into the guest virtual machine without requiring hypervisor intervention, thereby reducing interrupt latency while maintaining reliable interrupt delivery

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system is segmented into distinct functional components: the interrupt controller, the interposer circuit, and the processor core with virtual machine support. This segmentation allows the interposer to handle interrupt conversion independently, enabling direct virtual interrupt injection and eliminating the performance overhead associated with hypervisor involvement in the interrupt path

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If the interrupt controller does not support direct injection, then compatibility is maintained, but the ability to reduce latency is lost

Engineering Contradiction:
Improvecompatibility with interrupt controllersVSAvoidsystem performance
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The interposer circuit serves as a mediator that bridges the gap between legacy interrupt controllers lacking direct injection support and modern virtualization requirements. It translates commands from traditional interrupt controllers into formats suitable for direct virtual interrupt injection, thereby enabling performance improvements without sacrificing compatibility with existing interrupt controller hardware

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The interposer circuit dynamically changes the parameters of interrupt commands by converting physical interrupt identifiers and control signals into virtual interrupt identifiers and control signals. This parameter transformation enables the system to achieve low-latency virtual interrupt injection while maintaining compatibility with interrupt controllers that use different command formats and do not natively support direct injection

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11809349B1Direct injection of a virtual interrupt
Publication Date: 2023.11.07 AMAZON TECH INC
  • US11809349B1 patent drawing
  • US11809349B1 patent drawing
  • US11809349B1 patent drawing

AI summary

An interposer circuit is used between an interrupt controller and a processor core to facilitate direct injection of a virtual interrupt into a guest executing on the processor core, even though the interrupt controller does not support the direct injection. The interposer circuit can convert a command received from the interrupt controller for a physical interrupt into another command for a virtual interrupt to make the processor core believe that the processor core has received a virtual interrupt even though the interrupt controller is not able to provide the virtual interrupt. The virtual interrupt can be directly injected into the processor core without the intervention of a hypervisor executing on the processor core.