Interposer Wafer Dummy Die Replacement for Companion IC Protection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor device assembly processes cause thermal and charge damage to companion IC dies, result in high costs due to line yield losses, and lead to underperforming products due to random die combinations and size mismatches, affecting thermal performance.

Innovation Solution

A hybrid chip-on-wafer-on-substrate process where primary IC dies are attached with dummy dies initially, followed by processing and electrical testing, then replacing dummy dies with companion IC dies, ensuring they are attached only after primary IC dies have passed testing and protecting them from damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If companion IC dies are assembled on the interposer wafer at the start of the assembly process, then the assembly process can proceed with all components in place, but the companion IC dies will go through multiple thermal cycles during assembly causing thermal and charge damage

Engineering Contradiction:
Improveassembly process efficiencyVSAvoidthermal and charge damage to companion IC dies
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The assembly process is segmented into distinct phases: first assembling primary IC dies with dummy dies, then performing processing and testing, and finally replacing dummy dies with companion IC dies. This segmentation allows companion IC dies to be assembled only when necessary, avoiding exposure to harmful thermal cycles during intermediate processing steps.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Dummy dies are assembled in advance at the mounting sites for companion IC dies to maintain structural integrity during processing. This preliminary action with dummy components allows the interposer wafer to be handled and processed without actual companion IC dies, protecting them from damage when they are eventually assembled.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If companion IC dies are assembled at the start of the assembly process, then all components are in place for final packaging, but if the programmable IC die fails electrical testing, the companion IC die will be wasted or requires removal increasing costs

Engineering Contradiction:
Improveassembly line throughputVSAvoidwastage of companion IC dies
Core Design Contradiction:
ProductivityVSLoss of substance

Solution Approach 1:

Dummy dies are used as temporary, disposable placeholders at companion IC die mounting sites. These dummy components are inexpensive and can be removed without loss, allowing the system to test primary IC dies first and only assemble actual companion IC dies with known-good primary IC dies, eliminating wastage of expensive companion IC dies.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

Dummy dies serve as intermediary components that occupy mounting sites during processing and testing. They mediate between the need for complete assembly structure during manufacturing and the need to protect expensive companion IC dies from being wasted on failed primary IC dies.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If companion IC dies are assembled early in the process, then the complete stack can be packaged together, but the random combination of primary and companion IC dies may lead to underperforming products and size mismatches affecting thermal performance

Engineering Contradiction:
Improveintegration of multiple IC diesVSAvoidperformance consistency of semiconductor assembly
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Electrical testing of primary IC dies is performed before assembling companion IC dies. This feedback mechanism ensures that only known-good primary IC dies are paired with companion IC dies, eliminating random combinations and ensuring consistent performance and thermal characteristics in the final assembly.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9865567B1Heterogeneous integration of integrated circuit device and companion device
Publication Date: 2018.01.09 XILINX INC
  • US9865567B1 patent drawing
  • US9865567B1 patent drawing
  • US9865567B1 patent drawing

AI summary

An example method of manufacturing a semiconductor assembly includes: forming first integrated circuit (IC) dies and dummy dies; forming an interposer wafer including a top side having first mounting sites for the first IC dies and second mounting sites for second IC dies; attaching the first IC dies to the interposer wafer at the first mounting sites and the dummy dies to the interposer wafer at the second mounting sites; processing a backside and the top side of the interposer wafer; removing the dummy dies from the top side of the interposer wafer to expose the second mounting sites; and attaching the second IC dies to the interposer wafer at the exposed second mounting sites.