Interposer Wiring Segmentation for Signal Reliability
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Solution Overview
Problem
High wiring densities in semiconductor interposers lead to reliability issues with signal transmission due to thin wiring widths and thicknesses, causing instability in reference potential values and potential noise propagation.
Innovation Solution
The semiconductor device incorporates a configuration where reference potential wirings are electrically coupled along signal wirings at multiple points, with crossing patterns in plan view, to stabilize the reference potential and reduce electromagnetic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the wiring densities of the wirings formed in the interposer are increased, then the number of wirings which couple between the semiconductor components can be increased, but the reliability of signal transmission deteriorates due to instability in reference potential values and noise propagation
Solution Approach 1:
The interposer is divided into multiple wiring layers, with signal wirings and reference potential wirings separated into different layers. This segmentation allows high wiring density in the signal wiring layer while maintaining reliable signal transmission by isolating signal paths from noise-prone reference potential paths.
Solution Approach 2:
The patent transitions from a single-layer wiring structure to a multi-layer wiring structure. By stacking multiple wiring layers vertically, the interposer achieves high wiring density without compromising signal transmission reliability, as each layer can be optimized for its specific function (signal transmission or reference potential stabilization).
2Quantity of substance
If the wiring densities of the wirings formed in the interposer are increased, then the wiring densities can be improved, but the width and thickness of each wiring become thinner, causing instability in reference potential values
Solution Approach 1:
The wiring structure is segmented into separate signal wiring layers and reference potential wiring layers. This allows the reference potential wirings to be specifically optimized for stability (with adequate width and thickness) while signal wirings achieve high density, resolving the conflict between wiring density and reference potential stability.
Solution Approach 2:
Different wiring layers are designed with different local qualities: the reference potential wiring layer has optimized wiring dimensions for stability, while the signal wiring layer has optimized dimensions for density. This local differentiation allows each layer to perform its specific function effectively without compromising the other.
3Quantity of substance
If the wiring densities of the wirings formed in the interposer are increased, then the number of wirings can be increased, but electromagnetic interference and crosstalk noise increase
Solution Approach 1:
Signal wirings and reference potential wirings are segmented into different wiring layers, physically separating the signal paths from the reference potential paths. This segmentation reduces electromagnetic interference and crosstalk noise by increasing the distance between potentially interfering conductors while still achieving high wiring density through vertical stacking.
Solution Approach 2:
The patent uses vertical stacking of multiple wiring layers to achieve high wiring density without increasing lateral proximity between signal wirings and reference potential wirings. By moving the problem into the vertical dimension, the design maintains adequate spacing for noise reduction while achieving high density through layer multiplication.
Data Source
AI summary
To improve reliability of signal transmission of an interposer which couples between semiconductor chips. A reference potential wiring and a reference potential wiring are provided on both neighboring sides of a signal wiring provided in a first wiring layer of an interposer. Also, a reference potential wiring and a reference potential wiring are provided on both neighboring sides of a signal wiring provided in a second wiring layer of the interposer. Further, the signal wiring and the signal wiring cross each other in plan view. The reference potential wirings of the first wiring layer, and the reference potential wirings of the second wiring layer are coupled to each other at the periphery of their crossing portion.