Interprocess Memory Controller Pointer Sharing
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Solution Overview
Problem
Current interprocess communication techniques in multi-process devices are inefficient, leading to increased memory and bandwidth requirements, processing cycles, and instability due to lack of memory management enforcement, resulting in complex and power-intensive systems.
Innovation Solution
An interprocess memory controller that enforces access rights to shared memory, allowing efficient communication by passing pointers to buffers in shared memory, thereby avoiding data copying and ensuring authorized access and freeing of memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is copied from source process memory to destination process memory for interprocess communication, then data can be shared between processes, but memory storage requirements and bandwidth requirements increase
Solution Approach 1:
The patent uses a pointer copy mechanism instead of data copying. The source process memory region stores a pointer to the actual data, and the destination process receives this pointer. This allows the destination process to access the source process's memory directly without duplicating the data, thereby reducing memory storage requirements while maintaining communication reliability
Solution Approach 2:
The source process memory region acts as an intermediary structure that contains the pointer. This intermediary enables indirect access to the actual data, allowing interprocess communication without direct data copying. The pointer serves as the mediator between the source and destination processes
2Reliability
If data is copied from source process memory to destination process memory, then interprocess communication is enabled, but processing cycles and bus clock cycles are consumed
Solution Approach 1:
Instead of copying the actual data bytes, the system copies only the pointer (a small fixed-size value) from the source process memory region to the destination process. This reduces the number of processing cycles and bus clock cycles required compared to copying the entire data set
Solution Approach 2:
The patent replaces the mechanical data copying process with a pointer-based indirect access mechanism. This substitution eliminates the need for byte-by-byte data transfer operations, significantly reducing processing time and cycle consumption
3Adaptability or versatility
If memory size and bandwidth requirements are increased to support interprocess communication, then communication capability is improved, but space requirements and power requirements increase
Solution Approach 1:
The pointer copying mechanism enables interprocess communication capability without requiring additional memory bandwidth for data transfer. Since the pointer size is fixed and small compared to the actual data, the bandwidth consumption is minimized while maintaining full communication adaptability
Solution Approach 2:
The source process memory region serves multiple functions: it stores the actual data and simultaneously stores the pointer to that data. This multi-functionality allows the same memory structure to support both data storage and communication routing, reducing the need for separate communication infrastructure and associated power consumption
4Ease of operation
If processes self-manage shared memory usage without enforcement mechanisms, then memory access flexibility is improved, but system stability decreases due to potential unauthorized access
Solution Approach 1:
The source process memory region acts as an enforced intermediary structure that mediates all access to the shared data. This intermediary enforces the rule that only the source process can modify the data while the destination process can only read it via the pointer, providing both flexibility and stability through structured access control
Solution Approach 2:
The system uses self-enforcing memory protection mechanisms where the memory architecture itself prevents unauthorized access. The destination process cannot directly access or modify source process memory without going through the pointer mechanism, and the source process memory region structure inherently protects the data, eliminating the need for external enforcement while maintaining stability
Data Source
AI summary
An interprocess memory controller is described that may be used to provide multiple processes within a multi-process device with access to a shared physical memory. The described interprocess memory controller may enforce access rights to shared memory that has been allocated to the respective processes, thereby guarding the multi-process device from instability due to the unauthorized overwriting and/or unauthorized freeing of allocated memory. The described interprocess memory controller approach may streamline interprocess communication by allowing data associated with an interprocess communication to be passed from a first process to a second process by passing a pointer as well as access rights to a buffer in shared memory that contains the message data. In this manner, the described interprocess memory controller approach may avoid the inefficiency of interprocess communication approaches that copy message data from a shared memory controlled by a first process to a shared memory controlled by a second process.