Interprocessor Packet Protocol for Low-Overhead Wireless Links
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Solution Overview
Problem
Conventional inter-processor communication interfaces in wireless communication systems, such as the standardized mobile industry processor interface (MIPI), suffer from high bandwidth overhead, multi-layer error multiplication, and increased system complexity, which can lead to inefficiencies and errors in data transmission between baseband and radio frequency devices.
Innovation Solution
A lightweight protocol is introduced that enables fast and reliable inter-processor and inter-device communication using dedicated logic and state machines, with error detection and correction mechanisms, such as cyclic redundancy checks, to ensure accurate packet transmission and reduce bandwidth overhead, allowing for efficient communication between baseband and radio frequency components in wireless devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional inter-processor communication interfaces (such as MIPI) are used, then communication between baseband and radio frequency devices is established, but bandwidth overhead increases and system complexity increases
Solution Approach 1:
The patent extracts and removes unnecessary protocol layers and error correction mechanisms from the communication interface, retaining only the essential functions for reliable data transmission. This simplifies the overall system architecture while maintaining communication reliability between baseband and radio frequency devices.
Solution Approach 2:
The communication interface is designed to be self-sufficient with built-in error detection capabilities through CRC checks, eliminating the need for complex external error correction protocols. The interface handles its own reliability requirements internally, reducing overall system complexity.
2Reliability
If conventional inter-processor communication interfaces (such as MIPI) are used, then data transmission between processors is enabled, but bandwidth overhead increases
Solution Approach 1:
The patent removes redundant data fields and overhead bytes from the communication protocol, keeping only the essential data and minimal error detection information. This extraction reduces bandwidth consumption while preserving data transmission accuracy through targeted error checking.
Solution Approach 2:
The communication protocol uses variable-length data fields that adapt to the actual data being transmitted, rather than fixed-length fields. This parameter change optimizes bandwidth usage by transmitting only the necessary amount of data with appropriate error protection.
3Reliability
If error correction mechanisms are implemented, then communication reliability improves, but system complexity increases
Solution Approach 1:
The patent employs simple cyclic redundancy check (CRC) error detection instead of complex error correction codes. The CRC provides sufficient error detection capability for the application while being computationally inexpensive and easy to implement, avoiding the complexity of full error correction mechanisms.
Solution Approach 2:
The communication interface implements automatic retransmission based on CRC error detection. When errors are detected, the system requests retransmission of the affected data packets, providing reliable error handling through a simple feedback mechanism rather than complex forward error correction.
Data Source
AI summary
A method, an apparatus, and a computer program product for communication within a wireless terminal. The method can be implemented using dedicated logic and managed and controlled by state machines and/or sequencers. Data received or provided in a memory of a first integrated circuit of a terminal is encoded and transmitted in a data packet to a second integrated circuit. A header identifying the data type and providing a destination is included in the data packet. The destination may be identified as a memory address memory of the second integrated circuit that is mapped to a corresponding memory address of the first integrated circuit at which the data is received. In an aspect, the apparatus receives a header, detects an error in the received header, determines a failure to identify a packet boundary when the error is detected, and performs a search operation to identify the packet boundary.