Interrupt Handling Branch Detection Pipeline
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Solution Overview
Problem
Current computing systems incur a computational penalty due to the indiscriminate discarding of instructions before they are decoded, as they cannot determine if an interrupt occurs during a branch instruction's delay slots, leading to re-processing of instructions regardless of whether they are branch or non-branch instructions.
Innovation Solution
The system processes instructions until a branch instruction is detected, allowing non-branch instructions to continue uninterrupted while discarding branch instructions and their delay slots only after determining their presence, thereby minimizing the interrupt penalty.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If instructions are indiscriminately discarded before decoding to handle interrupts, then interrupt handling is simplified, but computational cycles are lost due to re-processing instructions
Solution Approach 1:
The system performs preliminary classification of instructions into branch and non-branch types before the interrupt occurs. By pre-identifying which instructions are branch instructions and their associated delay slots, the system can selectively discard only the necessary instructions when an interrupt occurs, rather than indiscriminately discarding all subsequent instructions. This preliminary action reduces the interrupt penalty by avoiding re-processing of non-branch instructions.
Solution Approach 2:
The instruction stream is segmented into different types (branch instructions, non-branch instructions, delay slots) with different handling rules. Branch instructions and their delay slots are marked for potential discarding, while non-branch instructions are allowed to complete. This segmentation enables selective interrupt handling that minimizes computational waste.
2Reliability
If branch instructions and delay slots are re-processed after interrupt, then correct execution is ensured, but computational efficiency decreases
Solution Approach 1:
The system performs preliminary identification and marking of branch instructions and their delay slots before the interrupt occurs. This preliminary action allows the system to know in advance which instructions need to be re-processed, enabling selective discarding rather than blanket discarding of all subsequent instructions. As a result, only the necessary branch-related instructions are re-processed, maintaining correctness while improving efficiency.
Solution Approach 2:
The system changes the state parameter of instructions by marking them as branch instructions or non-branch instructions. This parameter change enables different handling behaviors: branch instructions and their delay slots are marked for potential discarding and re-processing, while non-branch instructions are marked to complete without interruption. This parameter-based differentiation resolves the contradiction between reliability and productivity.
Data Source
Figure 1A~1B
Figure 2
Figure 3
AI summary
A system, processor and method are provided for digital signal processing. A processor may initiate processing a sequence of instructions followed by an interrupt. Each instruction may be processed in respective sequential pipeline slots. A branch detector may detect or determine if an instruction is a branch instruction, for example, in turn, for each sequential instruction. In one embodiment, the branch detector may detect if an instruction is a branch instruction until at least a first branch instruction is detected. A processor may annul instructions which are determined to be branch instructions when the interrupt occupies a delay slot associated with the branch instruction. An execution unit may execute at least the sequence of instructions to run a program. The branch detector and/or execution unit may be integral or separate from each other and from the processor.