Interrupt Handling in Coarse Grained Array Loop Processing

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Solution Overview

Problem

Existing coarse grained array architectures face significant overhead and complexity in processing interrupts due to the large number of register files, making it difficult to efficiently handle context switches, especially when interrupts occur during loop operations, which can violate real-time constraints.

Innovation Solution

The solution involves splitting loops into sub-loops and processing interrupts only after the completion of each sub-loop, with the result values stored outside the coarse grained array, thereby minimizing the data to be stored and reducing configuration memory requirements, and allowing for efficient context switching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If context switching is implemented in coarse grained array to handle interrupts, then interrupt processing capability is improved, but overhead and complexity increase significantly due to large number of register files

Engineering Contradiction:
Improveinterrupt processing capabilityVSAvoidoverhead and complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The loop is divided into multiple sub-loops, allowing the system to complete a smaller computational unit before handling interrupts. This segmentation reduces the amount of context that needs to be saved and restored during interrupt handling, thereby reducing overhead and complexity while maintaining interrupt processing capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention extracts and saves only the essential loop control variables (loop counter and loop limit) to external memory instead of saving the entire register file state. This extraction approach significantly reduces the amount of data that needs to be transferred during context switching, reducing overhead while preserving interrupt handling functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If interrupt processing is implemented in coarse grained array, then real-time constraint satisfaction is improved, but processing time increases due to context switching overhead

Engineering Contradiction:
Improvereal-time constraint satisfactionVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

By segmenting the loop into sub-loops, the system can complete interrupt handling more quickly since less computational state needs to be preserved. The shorter sub-loop execution intervals mean that when an interrupt occurs, the overhead of context switching represents a smaller proportion of total processing time, thus reducing time loss while maintaining real-time constraint satisfaction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The extraction of only critical loop variables to external memory dramatically reduces the time required for context switching. Instead of transferring large amounts of register data, only essential loop control information is saved and restored, significantly reducing processing time overhead while enabling real-time interrupt handling.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If loop is executed in coarse grained array, then processing efficiency is improved, but interrupt handling becomes difficult due to large amount of data to be stored

Engineering Contradiction:
Improveprocessing efficiencyVSAvoiddata to be stored
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The invention extracts only the essential loop control variables (loop counter and loop limit) from the register file and stores them in external memory. This selective extraction reduces the quantity of data that needs to be stored during interrupt handling from the entire register file contents to just a few critical variables, making interrupt handling feasible while maintaining loop execution efficiency.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7529917B2Method and apparatus for interrupt handling during loop processing in reconfigurable coarse grained array
Publication Date: 2009.05.05 SAMSUNG ELECTRONICS CO LTD
  • US7529917B2 patent drawing
  • US7529917B2 patent drawing
  • US7529917B2 patent drawing

AI summary

A processor including a coarse grained array including a plurality of function units and a plurality of register files, wherein a loop to be executed by the coarse grained array is split into a plurality of sub-loops, and when an interrupt request occurs while executing the sub-loop in the coarse grained array, the interrupt request is processed after the executing of the sub-loop is completed.