Interrupt Control Circuit Power State Routing
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Solution Overview
Problem
In multiprocessor systems configured as system LSIs, CPUs in low power consumption states are unnecessarily transitioned to normal operation when receiving interrupt requests, leading to increased power consumption.
Innovation Solution
An interrupt control circuit that determines the power consumption state of the interrupt-request destination CPU and automatically changes the interrupt destination to a CPU in a normal operation state, using an interrupt-destination priority order table to select an alternative CPU if the specified destination is in a low power consumption state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an interrupt request is submitted to a CPU in a low power consumption state, then the interrupt processing can be performed, but the power consumption increases due to the transition from low power state to normal operation state
Solution Approach 1:
The interrupt control circuit acts as an intermediary between the interrupt request source and the destination CPU. It receives the interrupt request, checks the power consumption state of the destination CPU, and decides whether to forward the interrupt request or select an alternative CPU. This mediator approach allows the system to maintain interrupt processing capability while avoiding unnecessary wake-ups of sleeping CPUs, thus resolving the contradiction between reliability and energy consumption.
Solution Approach 2:
The system implements feedback by having the interrupt control circuit check the power consumption state of the destination CPU before forwarding the interrupt request. Based on this feedback information, the interrupt control circuit dynamically decides whether to submit the interrupt to the original destination or select an alternative CPU. This feedback mechanism enables the system to adapt to the current power states of CPUs and optimize power consumption while ensuring interrupt processing reliability.
2Use of energy by moving object
If the interrupt destination is changed to another CPU when the specified CPU is in low power state, then the power consumption is suppressed, but the interrupt processing time may increase
Solution Approach 1:
The system performs preliminary action by having the interrupt control circuit check the power consumption state of the destination CPU before forwarding the interrupt request. This advance check allows the system to proactively select an appropriate CPU destination, avoiding the time penalty of waking up a sleeping CPU. By deciding the interrupt destination in advance based on power states, the system suppresses power consumption without significantly increasing interrupt processing time.
3Use of energy by moving object
If multiple CPUs are monitored for power consumption states, then the power management is optimized, but the complexity of the interrupt control circuit increases
Solution Approach 1:
The interrupt control circuit is designed with multi-functionality to handle various power consumption states of multiple CPUs. It can monitor the power states of different CPUs, check the state of the interrupt destination CPU, and select alternative CPUs when needed. This universal design allows the circuit to optimize power management for multiple CPUs without requiring separate control mechanisms for each CPU, thereby reducing overall complexity while achieving optimized power management.
Data Source
AI summary
A multiprocessor system includes a plurality of processor units each transmitting an interrupt request signal indicating an interrupt request for which an interrupt-request destination processor unit is specified and receiving an interrupt signal and an interrupt control circuit receiving the interrupt request signal from each of the plurality of processor units and transmitting the interrupt signal to each of the plurality of processor units, wherein, the interrupt control circuit transmits the interrupt signal to the interrupt-request destination processor unit specified by the interrupt request signal if the specified interrupt-request destination processor unit is not in a low power consumption state and transmits the interrupt signal to another processor unit different from the processor unit specified by the interrupt request signal if the specified interrupt-request destination processor unit is in the low power consumption state.


