Interrupt Control Unit Routing for Virtual Processing Units

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Solution Overview

Problem

Current data processing systems with multiple virtual processing units face inefficiencies in interrupt routing due to lack of flexibility and high resource consumption, particularly in SoC and NoC systems, where interrupts are not efficiently managed, leading to unnecessary activation of virtual units and increased execution time.

Innovation Solution

A method and system for processing interrupts that includes a shared and configurable interrupt control unit interconnected between processing units and peripheral units, allowing interrupts to be routed dynamically based on virtual unit identifiers, priority, and threshold conditions, reducing the complexity of circuits and programs managing interrupts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If interrupts are routed through a shared interrupt control unit with dynamic routing based on virtual unit identifiers, then routing flexibility and efficiency are improved, but device complexity increases

Engineering Contradiction:

Improverouting flexibilityVSAvoidcontrol unit complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The interrupt control unit is segmented into multiple independent interrupt registers, each associated with a specific virtual unit identifier. This allows the system to handle multiple virtual units simultaneously without requiring a single complex routing decision point, thereby improving routing flexibility while distributing complexity across multiple simple register structures.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Interrupt registers are pre-configured with virtual unit identifiers and associated metadata before interrupt arrival. When an interrupt occurs, the pre-configured registers enable direct matching and routing based on the interrupt's virtual unit identifier, eliminating the need for complex real-time routing decisions and reducing control unit complexity while maintaining high flexibility.

Inventive Principle:

Principle #10Preliminary action

2Loss of time

If interrupts are routed directly to virtual processing units without hypervisor intervention, then execution time is reduced, but reliability of interrupt management decreases

Engineering Contradiction:

Improveexecution timeVSAvoidinterrupt management reliability

Core Design Contradiction:

Loss of timeVSReliability

Solution Approach 1:

The interrupt register acts as an intermediary structure that bridges the interrupt source and the virtual processing unit. It pre-stores routing information and enables direct interrupt delivery to the correct virtual unit without hypervisor intervention, while still maintaining reliable management through its structured design that ensures correct routing decisions.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The interrupt register structure enables self-service routing by containing all necessary routing information (virtual unit identifiers, masking bits, priority levels) within the register itself. This allows the interrupt to be routed automatically based on its identifier matching against the pre-configured registers, eliminating the need for external hypervisor management while maintaining reliability through the structured register design.

Inventive Principle:

Principle #25Self-service

3Productivity

If multiple interrupt registers are maintained for different virtual units, then interrupt routing efficiency is improved, but manufacturing complexity increases

Engineering Contradiction:

Improveinterrupt routing efficiencyVSAvoidcircuit implementation complexity

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

Multiple interrupt registers are designed with identical universal structures, each capable of storing a virtual unit identifier, masking bits, and priority information. This uniform design allows the same register template to be replicated for different virtual units, improving routing efficiency through parallel handling while simplifying manufacturing by using a standardized, repeatable circuit design rather than custom circuits for each virtual unit.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS8312197B2Method of routing an interrupt signal directly to a virtual processing unit in a system with one or more physical processing units

Publication Date: 2012.11.13 STMICROELECTRONICS (ROUSSET) SAS

AI summary

The present disclosure relates to a method of processing an interrupt comprising a peripheral unit sending an interrupt, the interrupt being intended for a virtual unit executed by a processing unit, transmitting the interrupt to an interrupt control unit coupled to a processing unit, and the interrupt control unit storing the interrupt in an interrupt register. According to an embodiment of the present disclosure, the interrupt is transmitted to the interrupt control unit in association with an identifier of the virtual unit receiving the interrupt, the interrupt register in which the interrupt belonging to a set of registers is stored comprising one interrupt register per virtual unit likely to be executed by the processing unit, the interrupt being transmitted to the processing unit if the virtual unit receiving the interrupt is being executed by the processing unit.