Interrupt Controller Clearing Sources Without Bus Access
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Solution Overview
Problem
In current interrupt processing methods, CPUs spend significant time clearing interrupt sources, leading to system operation faults and delayed responses due to the need to access interrupt clear registers through multiple bus converters, especially in SOC systems with peripherals on different speed sub-buses.
Innovation Solution
An interrupt processing method and controller that store interrupt source clear information in the interrupt controller before CPU completion identification, allowing direct clearing of interrupts without CPU access through bus converters, utilizing a storage module and interrupt clear module to manage interrupt clear register and status register addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the CPU clears the interrupt source by accessing the interrupt clear register through multiple bus converter bridges, then the interrupt source can be cleared, but the CPU spends much time in the interrupt source clear operation which delays the response to other interrupts
Solution Approach 1:
The patent extracts the interrupt source clear function from the CPU and relocates it to the interrupt controller. The interrupt controller now directly clears interrupt sources by writing to clear registers without CPU intervention, eliminating the time-consuming bus access operations while the CPU focuses on interrupt processing
Solution Approach 2:
The interrupt controller acts as an intermediary between the CPU and interrupt sources. It receives interrupt requests, manages the clear operation autonomously, and communicates only the essential interrupt number to the CPU, thereby reducing the CPU's involvement and the associated bus access time
2Reliability
If the interrupt controller continuously responds to the same interrupt after one response without clearing the interrupt source, then system operation faults occur, but clearing the interrupt source through the CPU adds time overhead
Solution Approach 1:
The interrupt controller performs self-service by autonomously clearing interrupt sources without CPU intervention. It detects when an interrupt has been serviced and automatically clears the source, ensuring reliable interrupt handling while eliminating the time overhead of CPU involvement in the clear operation
Data Source
AI summary
Disclosed are an interrupt processing method and an interrupt controller. Before a CPU writes interrupt processing completion identification information of a current interrupt into an interrupt controller, interrupt source clear information of the interrupt is stored into the interrupt controller; and then when the interrupt controller receives a request, sent by the CPU, for writing the interrupt processing completion identification information, an interrupt source of the interrupt is directly cleared according to the interrupt source clear information stored in the interrupt controller, the CPU does not need to firstly access an interrupt clear register of a corresponding peripheral through a plurality of bus converter bridges to acquire information needed for clearing the interrupt source and then perform clearance. Therefore, the abovementioned solution can shorten the time needed by the CPU for clearing the interrupt source to a relatively great extent and avoid delaying the response time of other interrupts.