Interrupt Controller Transaction Duplication for Safety

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Solution Overview

Problem

In safety-critical systems, traditional methods for achieving high fault detection coverage, such as spatial redundancy, result in significant area and power overhead due to the need for duplicating components like interrupt controllers, which is undesirable in modern systems with increasing performance and feature demands.

Innovation Solution

An interrupt controller design that generates both original and duplicate transactions for each interrupt, buffers them, and only sends an output signal after both have been processed and received by the appropriate output interface, ensuring reliable delivery without invoking the interrupt service routine multiple times and avoiding full duplication of the interrupt controller.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If spatial redundancy (duplicating components) is used to achieve high fault detection coverage, then reliability is improved, but area overhead increases significantly

Engineering Contradiction:
Improvefault detection coverageVSAvoidarea overhead
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent segments the redundancy function into separate error detection and correction modules that operate on shared data paths rather than duplicating entire processor components. This allows fault detection coverage to be maintained while reducing area overhead by avoiding full spatial redundancy of processor components.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediary error detection and correction modules that mediate between the shared processor components and the output. These intermediaries provide reliability through error detection and correction without requiring duplication of the main processor components, thus reducing area overhead.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If spatial redundancy (duplicating components) is used to achieve high fault detection coverage, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improvefault detection coverageVSAvoidpower overhead
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent segments the reliability function into separate error detection and correction modules that consume less power than duplicating entire processor components. This segmentation allows maintaining fault detection coverage while reducing power overhead by avoiding full duplication of power-intensive processor components.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediary error detection and correction modules that provide reliability with lower power consumption compared to full spatial redundancy. These intermediaries monitor and correct errors in shared data paths without requiring the continuous operation of duplicate processor components, thus reducing power overhead.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If duplicate transactions are buffered and both must be received before output, then reliability is improved, but processing time increases

Engineering Contradiction:
Improvetransaction delivery reliabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements preliminary error detection and correction checks on transactions before they are fully processed. This allows the system to verify transaction integrity early in the processing pipeline, reducing the need for time-consuming retransmissions and improving overall processing time while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent incorporates feedback mechanisms that monitor transaction processing and provide early warning of errors. This feedback allows the system to take corrective action promptly, reducing processing time delays while maintaining high transaction delivery reliability through proactive error management.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3683681B1An interrupt controller and method of operation of an interrupt controller
Publication Date: 2022.01.19 ARM LTD
  • EP3683681B1 patent drawingFigure 1
  • EP3683681B1 patent drawingFigure 2
  • EP3683681B1 patent drawingFigure 3~4

AI summary

An interrupt controller, and method of operation of such an interrupt controller, are provided. The interrupt controller has an interrupt source interface for receiving interrupts from one or more interrupt sources, and a plurality of output interfaces, where each output interface is associated with a processing device that can execute an interrupt service routine to process an interrupt request issued to that processing device. The interrupt source interface has transaction generation circuitry to generate, for each received interrupt, an original transaction to represent the interrupt and a duplicate transaction to represent the interrupt. Buffer circuitry then buffers the original transaction and the duplicate transaction for each received interrupt, and selection circuitry is provided for selecting transactions from the buffer circuitry, and for routing each selected transaction for receipt by the output interface identified by an address portion of the selected transaction. Each output interface has queue storage comprising a plurality of queue entries, where each queue entry is allocated to a transaction received by the output interface and is used to store interrupt identifying information provided by a data portion of the transaction. The queue storage is arranged to maintain duplication tracking information to identify when both the original transaction and its associated duplicate transaction have been received by the output interface. Each output interface inhibits issuing an output signal that would cause an interrupt request for the original transaction to be sent to the associated processing device, until the duplication tracking information identifies that both the original transaction and the associated duplicate transaction have been received by that output interface. This provides an efficient functional safety compliant design for an interrupt controller.