Interrupt Controller Hierarchical Table Segmentation
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Solution Overview
Problem
In data processing systems with multiple virtual processors, the conventional interrupt handling mechanisms require significant software intervention and result in high performance overhead due to the need for large interrupt translation tables and reverse mapping, which complicates the routing of interrupts to active or inactive virtual processors.
Innovation Solution
An interrupt controller with redistribution circuitry and control circuitry that stores pointers to virtual and physical pending tables, allowing for efficient routing and handling of interrupts by determining the current status of virtual processors and storing or forwarding interrupts accordingly, with the ability to generate physical interrupts for inactive virtual processors and set priorities for pending interrupts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If an interrupt translation table is used to map virtual interrupts to physical interrupts, then interrupt routing capability is improved, but the device complexity and memory requirements increase significantly
Solution Approach 1:
The patent segments the interrupt translation table into multiple smaller tables organized hierarchically. Instead of a single large table storing all virtual-to-physical interrupt mappings, the system divides it into parent tables and child tables, where parent tables store partial mapping information and child tables store detailed mappings. This segmentation reduces the complexity of any single table while maintaining the complete routing capability.
Solution Approach 2:
The patent introduces a hierarchical dimension to the interrupt translation structure. Rather than a flat two-dimensional mapping (virtual interrupt ID to physical interrupt ID), the system adds a hierarchical level with parent-child table relationships. This allows the system to break down a large complex mapping into smaller manageable tables organized in tiers, reducing the complexity burden on any single table while preserving full routing functionality.
2Adaptability or versatility
If a large interrupt translation table is used to store mappings for many virtual processors, then complete interrupt routing coverage is improved, but the loss of time for processing increases due to larger table search requirements
Solution Approach 1:
The patent segments the large interrupt translation table into multiple smaller parent and child tables. Each parent table covers a subset of virtual processors or interrupt ranges, and contains references to appropriate child tables. This segmentation allows the interrupt processing system to search smaller tables rather than one large table, significantly reducing the time required to find the correct physical interrupt mapping while still supporting a large number of virtual processors.
Solution Approach 2:
The patent implements preliminary organization of interrupt mappings into a hierarchical structure before interrupt processing occurs. Parent tables are pre-configured with references to child tables, and the hierarchical relationships are established in advance. When an interrupt needs routing, the system can quickly navigate this pre-organized structure rather than searching through all mappings, reducing processing time while maintaining comprehensive coverage.
3Reliability
If reverse mapping is performed by the hypervisor to determine the physical interrupt, then accurate interrupt delivery is improved, but the loss of time and software overhead increase significantly
Solution Approach 1:
The patent introduces hierarchical parent tables as intermediaries between the virtual interrupt input and the physical interrupt output. Instead of the hypervisor performing direct reverse mapping searches, the parent tables serve as intermediate lookup structures that guide the system to the correct child table and ultimately to the physical interrupt mapping. This intermediary structure automates the mapping process and reduces software intervention requirements.
Solution Approach 2:
The patent enables the interrupt translation system to perform its own mapping resolution through the hierarchical table structure, reducing dependency on hypervisor software intervention. The parent-child table relationships are designed to automatically guide the interrupt routing process, with the table structure itself providing the mapping logic. This self-service capability reduces software overhead while maintaining accurate interrupt delivery.
4Adaptability or versatility
If the hypervisor schedules the virtual machine when it is not currently active, then interrupt delivery to inactive virtual processors is improved, but the device complexity and processing overhead increase
Solution Approach 1:
The patent segments the interrupt handling mechanism into hierarchical parent and child tables that can independently process interrupts for both active and inactive virtual processors. The parent tables contain mappings that work regardless of virtual processor state, and child tables provide detailed routing information. This segmentation allows the system to handle interrupts for inactive processors through the table structure itself rather than requiring complex hypervisor scheduling logic.
Solution Approach 2:
The hierarchical table structure acts as an intermediary that handles interrupt routing for both active and inactive virtual processors without requiring direct hypervisor scheduling intervention. The parent-child table relationships provide a automated mechanism that resolves interrupts appropriately based on the virtual processor state, reducing the complexity of the overall control mechanism while maintaining the ability to deliver interrupts to inactive processors.
Data Source
AI summary
An interrupt controller for controlling the routing and handling of interrupts received at a data processing apparatus including at least one physical processing unit configured to run at least one of a plurality of virtual processors and a memory. The interrupt controller includes redistribution circuitry with at least one data store corresponding to the unit, the data store storing a pointer to a virtual pending table storing currently pending virtual interrupts for a virtual processor currently running on the corresponding unit and a pointer to a pending table configured to store currently pending physical interrupts for the corresponding unit and an input configured to receive a virtual interrupt for interrupting a virtual processor. Control circuitry is configured to add the virtual interrupt to the virtual pending table and to store the virtual interrupt in the virtual pending table for the virtual processor that is stored in the memory.