Interrupt Controller Self-Diagnosis for Microcomputer Safety
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Solution Overview
Problem
Existing techniques for detecting failures in interrupt controllers and interrupt signal systems in microcomputers used for onboard control, particularly those with high functional safety requirements, face challenges such as increased circuit scale, power consumption, and complexity in creating test patterns, making it difficult to enhance reliability and safety without significant hardware additions or power increases.
Innovation Solution
A method involving periodic generation of test interrupt requests to check the state of interrupt request flags, where repeated set states indicate potential failures, allowing for abnormality detection without relying on dualization or extensive test pattern creation, thus reducing circuit scale and power consumption, and enabling continuous processing in case of failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lock-step architecture is applied to dualize the interrupt controller for failure detection, then reliability is improved, but device complexity and circuit scale increase significantly
Solution Approach 1:
The interrupt controller performs self-diagnosis by monitoring its own interrupt request flags. The determination circuit checks whether interrupt request flags are maintained in a set state across multiple interrupt cycles, enabling the system to detect its own failures without external testing or dualization.
Solution Approach 2:
The system implements feedback by continuously monitoring the state of interrupt request flags and comparing them across consecutive interrupt cycles. When abnormal persistence of set state is detected, it triggers failure notification, creating a closed-loop self-monitoring mechanism.
2Measurement precision
If built-in self-test (BIST) is implemented for comprehensive hardware testing, then measurement precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The invention extracts only the critical failure mode detection from comprehensive BIST - specifically monitoring whether interrupt request flags are abnormally maintained in set state. This selective approach detects the most important failures without requiring full hardware test pattern generation.
Solution Approach 2:
Instead of implementing expensive, comprehensive BIST hardware, the system uses simple software-based flag state monitoring that consumes minimal resources. The determination circuit uses basic logic to check flag states across interrupt cycles, providing adequate failure detection at low cost.
3Reliability
If comprehensive test patterns are created for high coverage, then reliability is improved, but loss of time and productivity decrease
Solution Approach 1:
The determination circuit performs failure detection periodically at each interrupt cycle by checking the state of interrupt request flags. This continuous periodic monitoring provides timely failure detection without requiring lengthy dedicated test sequences, as detection occurs naturally during normal interrupt processing.
Data Source
AI summary
To detect an abnormality in an interrupt control system without completely depending on dualization of a circuit, without the need to create a test pattern for a built-in self-test by spending time, and without considerably increasing an amount of power consumption. A test interrupt request is generated periodically using a timer or the like in an interrupt signal system from an interrupt controller to a central processing unit, the state of an interrupt request flag within the interrupt controller is checked in an interrupt processing routine, and in the case where it is detected that the same interrupt request flag is kept in a set state twice or more in succession, it is supposed that there is a high possibility that a failure has occurred in the interrupt signal system and it is considered that there is an abnormality.