Interrupt Controller Temporal Proximity Coalescing
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Solution Overview
Problem
Current interrupt controllers in microprocessors and microcontrollers handle all interrupts as if they are critical, leading to inefficiencies due to frequent entering and exiting of interrupt service routines (ISRs) for low-priority interrupts, which consume processor time and prevent simultaneous handling of multiple interrupts.
Innovation Solution
The proposed interrupt controller employs a Temporal Proximity Interrupt Coalescing method using a counter and latency value register to create a time window for grouping and delaying the processing of interrupts, allowing for tail-chaining and coalescing of interrupts, thereby reducing overhead and enabling efficient handling of multiple interrupts through a single service routine.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If frequent interrupts are handled immediately, then interrupt response time is improved, but processor overhead increases due to repeated ISR entry and exit
Solution Approach 1:
The patent merges multiple frequent interrupt service routines into a single consolidated ISR. The interrupt controller accumulates multiple interrupt requests and services them together in one ISR execution, eliminating repeated entry and exit overhead while maintaining responsive handling of all interrupt sources.
Solution Approach 2:
The interrupt controller performs preliminary accumulation and grouping of interrupt requests before triggering the ISR. By pre-processing and batching multiple interrupts together, the system prepares for efficient consolidated handling, reducing the frequency of ISR execution while ensuring all interrupts are captured and serviced.
2Reliability
If multiple interrupts are handled sequentially in separate ISRs, then each interrupt is serviced individually, but processor time is consumed by repeated preamble and post-amble operations
Solution Approach 1:
Multiple separate ISR execution sequences are merged into a single consolidated ISR. The controller combines the handling of multiple interrupt sources into one service routine execution, eliminating redundant preamble and post-amble operations while ensuring all interrupts are serviced completely.
3Reliability
If interrupt service routines are executed frequently, then interrupt sources are serviced promptly, but system performance degrades due to overhead
Solution Approach 1:
The interrupt controller performs preliminary accumulation of interrupt requests before triggering service. By batching multiple interrupts together and preparing them for consolidated handling, the system maintains complete service of all interrupt sources while reducing the frequency of ISR execution to improve overall system performance.
Data Source
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AI summary
An interrupt controller has an interrupt register unit receiving a plurality of interrupt source signals, an interrupt detector coupled to the interrupt register unit, a counter unit coupled to the interrupt detector, wherein on the first occurrence of an interrupt source signal the counter unit defines a time window during which the interrupt register stores further interrupt source signals, and an interrupt request unit coupled to the counter unit for generating an interrupt request signal.