Runtime Interrupt Delivery via Processor Affinity Pushdown

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Solution Overview

Problem

In computer network systems, device interrupts often mismatch with the processor they are intended for, leading to performance degradation due to cache thrashing and system overheads, especially in high-interrupt-rate applications like UDP, where this mismatch occurs frequently.

Innovation Solution

Implementing processor affinity to direct interrupts to the best available processor at runtime, either where the target application/thread is running or in the same socket, by pushing down affinity information to network devices or chipsets, allowing them to deliver interrupts efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If device interrupts are delivered using static configuration or round robin scheme, then interrupt delivery is simple to implement, but interrupt-processor mismatch occurs frequently leading to performance degradation

Engineering Contradiction:
Improveinterrupt delivery implementationVSAvoidsystem performance
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent implements dynamic interrupt delivery by pushing processor affinity information down to the network device driver and chipset, allowing the system to adapt interrupt routing to current processor availability and application location rather than using static configurations. This enables the interrupt delivery mechanism to dynamically respond to runtime conditions, resolving the contradiction between implementation simplicity and system performance.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If interrupts are delivered to processors not running the target application, then interrupt routing is simplified, but cache thrashing occurs between interrupt processing and application execution

Engineering Contradiction:
Improveinterrupt routing mechanismVSAvoidcache thrashing
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent applies preliminary action by pushing processor affinity information down to the network device driver and chipset in advance, before interrupts are generated. This allows the interrupt routing infrastructure to be pre-configured with the correct processor affinity mappings, enabling efficient direct delivery of interrupts to the processors running the target applications without requiring complex runtime decision-making, thus eliminating cache thrashing while maintaining routing simplicity.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If processor affinity information is pushed down to network devices, then interrupt delivery efficiency is improved, but system complexity increases

Engineering Contradiction:
Improveinterrupt delivery efficiencyVSAvoidsystem architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary approach by pushing processor affinity information down to the network device driver layer, which acts as a mediator between the operating system and the hardware chipset. This intermediary layer manages the complexity of affinity tracking and propagation, allowing efficient interrupt delivery without requiring direct complex interactions between all system components. The driver layer absorbs the complexity burden, keeping the overall system architecture manageable while achieving high interrupt delivery efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8838864B2Method and apparatus for improving the efficiency of interrupt delivery at runtime in a network system
Publication Date: 2014.09.16 INTEL CORP
  • US8838864B2 patent drawing
  • US8838864B2 patent drawing
  • US8838864B2 patent drawing

AI summary

Processor affinity of an application/thread may be used to deliver an interrupt caused by the application/thread to a best processor at runtime. The processor to which the interrupt is delivered may either run the target application/thread or be located in the same socket as the processor that runs the target application/thread. The processor affinity of the application/thread may be pushed down at runtime to a network device, a chipset, a memory control hub (“MCH”), or an input/output hub (“IOH”), which will facilitate delivery of the interrupt using that affinity information.