Interrupt Interface Processor Availability Estimation

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Solution Overview

Problem

In multi-processor systems, determining which processor should service a shared interrupt request can be time-consuming, leading to delays and performance loss as other processors may suspend processing unnecessarily while waiting to be selected.

Innovation Solution

The target interrupt interface estimates the availability of the corresponding processor without passing the shared interrupt request, issuing an interrupt ownership request to the distributor only if available, and passing the request once confirmation is received, allowing processors to continue processing during ownership determination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the shared interrupt request is passed to multiple processors to determine availability, then the system can identify which processor should service the interrupt, but the processors must suspend processing during this determination period causing performance loss

Engineering Contradiction:

Improveinterrupt handling correctnessVSAvoidprocessor processing performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The interrupt interface performs preliminary actions by estimating processor availability and issuing ownership requests before actually passing the interrupt to the processor. This preliminary determination allows the system to identify the target processor without forcing all processors to suspend their current work, thus maintaining productivity while ensuring reliable interrupt handling.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The interrupt interface acts as an intermediary between the interrupt source and the processors. It estimates processor availability, manages ownership requests, and selectively passes interrupts only to the chosen processor. This intermediary role eliminates the need for all processors to suspend processing, resolving the contradiction between reliability and productivity.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If the interrupt request is passed to the processor before determining ownership, then the processor can respond if available, but this causes processors to remain idle during the period between receiving the interrupt and being selected

Engineering Contradiction:

Improveprocessor availability detectionVSAvoidprocessor idle time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary availability estimation and ownership determination before passing the interrupt to the processor. This prevents processors from entering an idle state by ensuring they only receive interrupts after being selected as the target, thereby eliminating unnecessary idle time while maintaining reliable availability detection.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

Instead of passing the interrupt to the processor first and then determining ownership (which causes idle time), the system inverts the sequence by determining ownership first and then passing the interrupt only to the selected processor. This inversion eliminates processor idle time while maintaining reliable availability detection.

Inventive Principle:

Principle #13The other way round (Inversion)

3Reliability

If all processors suspend processing to check for interrupt availability, then the system can determine which processor should handle the interrupt, but this causes significant performance loss since all but one processor will not be selected

Engineering Contradiction:

Improveinterrupt routing accuracyVSAvoidoverall system processing throughput

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The interrupt interface serves as an intermediary that manages the interrupt routing process. It estimates processor availability, coordinates ownership requests, and ensures only the selected processor receives the interrupt. This intermediary mechanism achieves accurate interrupt routing without requiring all processors to suspend processing, thus maintaining high system throughput.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

Each processor's interrupt interface independently estimates the availability of its corresponding processor and manages ownership requests without requiring other processors to suspend their work. This self-service approach allows processors to continue their current tasks while the interrupt interface handles the routing decision, preserving overall system productivity while ensuring accurate interrupt routing.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS10019394B2Handling interrupts in a multi-processor system

Publication Date: 2018.07.10 ARM LTD

AI summary

A data processing apparatus has a plurality of processors and a plurality of interrupt interfaces each for handling interrupt requests from a corresponding processor. An interrupt distributor controls routing of interrupt requests to the interrupt interfaces. A shared interrupt request is serviceable by multiple processors. In response to the shared interrupt request, a target interrupt interface issues an interrupt ownership request to the interrupt distributor, without passing the shared interrupt request to the corresponding processor, if it estimates that the corresponding processor is available for servicing the shared interrupt request. The shared interrupt request is passed to the corresponding processor when an ownership confirmation is received from the interrupt distributor indicating that the processor has been selected for servicing the shared interrupt request.