Interrupt Handling Latency Reduction via Direct Processor Access
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Solution Overview
Problem
Conventional computer systems experience significant interrupt handling latencies due to extensive communication paths between ISR, device drivers, and DPCs, particularly in multiprocessor systems where interrupts are shared among multiple devices, leading to reduced operating speed.
Innovation Solution
A computer system and method that utilize a device driver to store Task MSI data in memory, including processor identification, priority, thread context, and DPC address, allowing processors to directly service interrupts without relying on conventional ISR processing, thereby reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional APIC techniques with ISR and device driver communication are used, then interrupt handling follows standard protocol, but interrupt handling latency increases significantly
Solution Approach 1:
The device driver pre-registers the interrupt service routine address and parameters in a system data structure before the interrupt occurs. When the interrupt happens, the processor can directly access the pre-prepared ISR information without needing to communicate with the device driver during interrupt handling, thus reducing latency while maintaining protocol compliance
Solution Approach 2:
The patent extracts the ISR address and parameters from the device driver and places them in a shared system data structure that the processor can access directly. This separates the interrupt handling information from the device driver, allowing the processor to service interrupts independently without waiting for device driver communication
2Adaptability or versatility
If device drivers successively activate to service shared interrupts, then all devices can be serviced, but interrupt handling time increases
Solution Approach 1:
Each device driver registers its ISR address and parameters in the shared data structure in advance. When a shared interrupt occurs, the processor autonomously determines which device caused the interrupt by checking the data structure and services it directly without requiring successive activation of multiple device drivers, thus reducing interrupt handling time while maintaining shared interrupt support
Data Source
AI summary
Methods and apparatuses are provided for servicing an interrupt in a computer system. The method includes a device driver receiving an interrupt request. The device driver is responsive to the interrupt request to store interrupt data in a portion of the memory. The interrupt data includes identification of at least one processor of the plurality of processors capable of servicing the interrupt request; priority of the interrupt request; a thread context; and an address for instructions to service the interrupt request. The device driver then instructs the peripheral device to issue a memory write to the plurality of processors so that each may determine if it can use the thread context and the instructions to service the interrupt. A computer system is provided with the hardware needed to perform the method.


