Interrupt Masking Control for Critical Response
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Solution Overview
Problem
The existing data processing systems, such as those using ARM processors, face issues where software-controlled interrupt masking bits can be inappropriately set, leading to potential failure in responding to critical interrupt signals due to programming bugs or malfunctions.
Innovation Solution
An additional masking control signal, not accessible to software, is introduced to prevent the interrupt mask bit from being changed from a state that allows interrupts to a state that blocks them, ensuring the system can respond to critical interrupts by preventing software from inappropriately masking further interrupt signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the interrupt mask bit is set under software control to enforce atomic execution, then the flexibility in interrupt masking is improved, but the reliability of critical interrupt response deteriorates due to potential programming bugs
Solution Approach 1:
The interrupt masking control is segmented into two independent parts: a programmable control register that software can modify for flexibility, and a separate masking control circuit that hardware controls to ensure reliability. This segmentation allows each part to fulfill its specific function without compromising the other.
Solution Approach 2:
A masking control circuit acts as an intermediary between the programmable control register and the interrupt mask bit. This intermediary prevents direct software modification of the mask bit when the control circuit is active, thereby blocking potentially harmful software changes while preserving legitimate interrupt masking functionality.
2Reliability
If the interrupt mask bit is made immutable to prevent inappropriate masking, then the reliability of interrupt response is improved, but the flexibility in interrupt control deteriorates
Solution Approach 1:
The system dynamically adjusts the mutability of the interrupt mask bit based on operational context. During critical interrupt handling, the masking control circuit prevents software from changing the mask bit, ensuring reliability. During normal operation, software retains full control for flexible interrupt management.
Solution Approach 2:
Different parts of the interrupt control system have different properties: the programmable control register maintains full software accessibility for flexibility, while the interrupt mask bit itself becomes protected during critical operations. This local differentiation of control properties resolves the contradiction between flexibility and reliability.
Data Source
AI summary
A processor core 4 is provided with an interrupt controller 22 which serves to set an interrupt mask bit F and a hardware control when an interrupt fiq occurs. A masking control signal NMI serves to either allow or prevent the software clearing of the interrupt mask bit F.


