Interrupt Module Prioritizes Thread Allocation in Multithreaded Processors

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Solution Overview

Problem

In multithreaded processors, high priority threads are often disrupted by interrupts, leading to increased overhead and latency, as existing systems do not efficiently allocate interrupts to threads based on their priority and availability.

Innovation Solution

A multithreaded processor with an interrupt module that identifies thread priorities and allocates interrupts to threads based on their priority, ensuring that high priority tasks are not interrupted by directing interrupts to threads in wait mode or those with lower priorities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If interrupts are allocated to any available thread without priority consideration, then interrupt processing is simple and fast, but high priority threads are disrupted and latency increases

Engineering Contradiction:
Improveinterrupt allocation simplicityVSAvoidthread latency
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The system changes the parameter of thread selection from arbitrary or round-robin to priority-based selection. The interrupt module evaluates thread priority levels and selects the lowest priority available thread to handle interrupts, thereby protecting high priority threads from disruption while maintaining efficient interrupt handling.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

An interrupt module is introduced as an intermediary between interrupt sources and thread execution units. This module acts as a mediator that receives interrupts, evaluates thread priorities, and allocates interrupts to appropriate threads, preventing direct disruption of high priority threads while maintaining systematic control.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If interrupts are always handled by the first available thread, then interrupt response time is minimized, but high priority task execution is delayed

Engineering Contradiction:
Improveinterrupt response speedVSAvoidhigh priority task throughput
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The thread selection parameter changes from first-available or round-robin to lowest-priority-available. The system maintains fast interrupt response by immediately allocating to an available thread, but ensures high priority task productivity by selecting threads with lower priority values that are less critical to the system's primary function.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Different threads are assigned different priority qualities based on their task importance. High priority threads are protected from interrupt disruption to maintain productivity, while low priority threads serve as interrupt sinks. This local differentiation of thread quality enables simultaneous optimization of both response speed and task throughput.

Inventive Principle:
Principle #3Local quality

3Productivity

If high priority threads process interrupts, then interrupt handling is efficient, but thread overhead increases and task completion is delayed

Engineering Contradiction:
Improveinterrupt handling efficiencyVSAvoidthread overhead
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The system changes which threads handle interrupts from high priority threads to low priority threads. By selecting threads with lower priority values to process interrupts, the system maintains efficient interrupt handling while minimizing overhead on critical high priority threads, thereby reducing energy loss and improving overall system efficiency.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP2347334B1Methods and systems for allocating interrupts in a multithreaded processor
Publication Date: 2016.09.14 QUALCOMM INC
  • EP2347334B1 patent drawingFigure 1
  • EP2347334B1 patent drawingFigure 2
  • EP2347334B1 patent drawingFigure 3

AI summary

A multithreaded processor capable of allocating interrupts is described. In one embodiment, the multithreaded processor includes an interrupt module and threads for executing tasks. The interrupt module can identify a priority for each thread based on a task priority for tasks being executed by the threads and assign an interrupt to a thread based at least on its priority.