Interrupt Prioritization Code Generation in Modeling Environments
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Solution Overview
Problem
Current graphical models, such as block diagram models, do not generate code for implementing asynchronous interrupt prioritization, which is essential for real-time operation in systems like the TI C6000 and TI C2000 processors, limiting the ability to achieve true real-time multitasking without software-based interrupt prioritization.
Innovation Solution
A computer-implemented method and system for implementing interrupt prioritization in a modeling environment, which includes obtaining information about interrupts and using it to automatically generate code for prioritizing interrupts, allowing for dynamic asynchronous interrupt handling and hardware interrupt prioritization, even in targets that do not support these features natively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If graphical models automatically generate code for real-time implementation, then productivity and development time are improved, but the ability to implement software-based interrupt prioritization is lost
Solution Approach 1:
The system segments the code generation process by separating interrupt handling code generation from the main automatic code generation workflow. The graphical model is divided into components that can independently define interrupt priorities, allowing the code generator to produce both automatic control code and customized interrupt prioritization code separately and then integrate them.
Solution Approach 2:
The system introduces dynamic configurability to the code generation process by allowing users to modify interrupt priority assignments in the graphical model without regenerating the entire system. The code generator can dynamically adjust the generated interrupt handling code based on priority parameters defined in the model, enabling adaptability while maintaining automated generation benefits.
2Device complexity
If the system uses hardware interrupt prioritization only, then device complexity is reduced, but adaptability to different target processors is limited
Solution Approach 1:
The graphical model framework provides a universal interface for defining interrupt priorities that can map to different underlying implementations. The same model can generate code for processors with hardware prioritization support by utilizing native hardware features, while for processors without such support, the generator automatically produces software-based prioritization routines, making the system universally applicable across multiple target architectures.
Solution Approach 2:
The code generator acts as an intermediary layer between the graphical model and the target processor. It translates the abstract priority definitions from the model into processor-specific interrupt handling code, whether utilizing hardware mechanisms or software simulations. This intermediary approach allows the system to work with diverse processors without increasing model complexity.
3Adaptability or versatility
If manual implementation of interrupt prioritization is required, then adaptability is improved, but productivity and ease of operation deteriorate
Solution Approach 1:
The system enables self-service by allowing the graphical model to automatically generate the interrupt prioritization code based on priority parameters defined within the model itself. Users configure interrupt priorities through the graphical interface, and the code generator automatically produces the appropriate interrupt handling routines without requiring manual programming. This eliminates tedious manual implementation while preserving the flexibility of customized priority assignments.
Data Source
AI summary
In one embodiment, a method of implementing interrupt prioritization and preemption in a modeling environment is provided. The method may include obtaining a model including interrupt-generating components in the modeling environment, obtaining information describing interrupts in the model, and using the information describing the interrupts in the model to automatically generate code for prioritizing the interrupts in the modeling environment.