Interrupt Controller Arbitration for Priority Threshold Preemption
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Solution Overview
Problem
Processors face challenges in efficiently processing interrupts with varying priorities, leading to potential deadlocks and resource occupation due to high-priority interrupts preempting lower-priority ones, necessitating an improved interrupt processing mechanism.
Innovation Solution
An interrupt controller with an arbitration circuitry that selects the highest-priority interrupt based on a preset threshold comparison, ensuring efficient processing by prioritizing interrupts and minimizing resource consumption during nesting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a high-priority interrupt preempts a low-priority interrupt, then the high-priority interrupt is processed faster, but a deadlock situation may occur where the high-priority interrupt cannot execute because required resources are occupied by the low-priority interrupt
Solution Approach 1:
The patent applies preliminary action by checking resource occupancy status before allowing interrupt preemption. The arbitration circuitry determines whether resources required by the high-priority interrupt are currently occupied by the low-priority interrupt before granting preemption. This preventive check avoids deadlock situations by not allowing preemption when it would cause the high-priority interrupt to stall, thus maintaining both fast processing and reliability.
2Adaptability or versatility
If the processor processes multiple interrupts with different priorities, then interrupt handling becomes more comprehensive, but the complexity of interrupt management increases
Solution Approach 1:
The patent segments the interrupt controller into distinct functional modules: an arbitration circuitry for priority determination and preemption control, and a sampling circuitry for interrupt reception and initial processing. This segmentation allows complex multi-priority interrupt handling to be managed through modular, independent components, reducing overall system complexity while maintaining comprehensive interrupt handling capability.
3Loss of time
If the processor responds to all interrupts immediately, then real-time responsiveness is improved, but processor resources may be occupied for too long
Solution Approach 1:
The patent applies dynamics by implementing dynamic priority adjustment and conditional preemption. The arbitration circuitry dynamically evaluates the current interrupt context, resource occupancy status, and priority levels to determine whether preemption should occur. This dynamic approach allows the system to respond to critical interrupts quickly when resources are available, while avoiding premature preemption that would extend resource occupation time unnecessarily, thus balancing responsiveness with resource management.
Data Source
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AI summary
Embodiments of the present disclosure provide an interrupt controller in a processor, comprising: an interrupt sampling circuitry configured to receive one or more interrupts from one or more interrupt sources that are communicatively coupled to the interrupt controller; and an arbitration circuitry configured to select a to-be-responded interrupt from the received one or more interrupts, the arbitration circuitry comprising: a selection circuitry configured to select from the one or more interrupts a highest-priority interrupt that has a highest priority among the one or more interrupts; and a threshold comparison circuitry communicatively coupled to the selection circuitry, the threshold comparison circuitry configured to compare the priority of the highest-priority interrupt with a preset priority threshold, wherein the arbitration circuitry is configured to select the highest-priority interrupt as the to-be-responded interrupt in response to the threshold comparison circuitry determining that the priority of the highest-priority interrupt is higher than the preset priority threshold.