Interrupt Relay Delays CPU Wake-Up for Power Savings

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Solution Overview

Problem

Existing CPU power management techniques consume excessive power as they activate the CPU and associated hardware stages simultaneously, leading to unnecessary power usage during settling times of functional stages like ADC converters.

Innovation Solution

An interrupt relay system that delays routing interrupts to the CPU until the functional stage has settled, allowing the CPU to remain in a low-power mode until the functional stage is ready, thereby reducing overall power consumption by keeping the CPU in sleep mode during settling times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the CPU is activated immediately upon receiving an interrupt to ensure the functional stage can be used, then the functional stage becomes available, but the power consumption increases during settling time

Engineering Contradiction:
Improvefunctional stage availabilityVSAvoidCPU power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The interrupt relay is activated in advance to monitor interrupt requests before the CPU is woken up. When an interrupt occurs during sleep mode, the relay captures the interrupt signal and holds it until the functional stage is ready, preventing premature CPU activation and reducing power consumption during the settling period.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The interrupt relay acts as an intermediary component between the interrupt source and the CPU. It mediates the interrupt signal transmission by conditionally blocking or passing the signal based on the readiness status of the functional stage, thereby decoupling the interrupt occurrence from CPU activation and enabling power savings.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Use of energy by moving object

If the CPU remains in sleep mode during settling time to reduce power consumption, then energy is saved, but the interrupt response time is delayed

Engineering Contradiction:
ImproveCPU power consumptionVSAvoidinterrupt response time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The interrupt relay is prepared in advance in a ready state to immediately capture and hold interrupt signals when they occur during CPU sleep mode. This preliminary preparation ensures that no interrupt is lost or delayed, as the relay continuously monitors the interrupt line and is ready to assert the held interrupt as soon as the functional stage becomes available.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The interrupt relay serves as a buffer intermediary that decouples the timing of interrupt occurrence from CPU wake-up. It accumulates interrupt requests during the settling period and releases them appropriately, ensuring that interrupt response time is not penalized while still allowing the CPU to remain in low-power mode during functional stage settlement.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If multiple hardware stages are activated simultaneously with the CPU, then system readiness is achieved, but unnecessary power is consumed during settling periods

Engineering Contradiction:
Improvesystem readinessVSAvoidsystem power consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The interrupt relay is activated and configured in advance to monitor interrupt requests before the CPU and functional stages are fully powered up. This allows the system to capture interrupt signals during the settling period without requiring the CPU to be active, thereby avoiding unnecessary power consumption while maintaining interrupt handling capability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The interrupt relay acts as an intermediary that separates the power-up sequence of the CPU from the interrupt monitoring function. By placing the relay in the power path early in the boot sequence, it enables interrupt capture during settling periods without requiring simultaneous activation of all hardware stages, thus reducing unnecessary power consumption.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP2186010B1Electronic device with CPU and interrupt relay stage
Publication Date: 2011.04.06 TEXAS INSTR DEUTLAND GMBH
  • EP2186010B1 patent drawingFigure 1~2
  • EP2186010B1 patent drawingFigure 3~4

AI summary

An electronic device with a CPU configured to be switched from a low power mode into a higher power mode in response to an interrupt and an interrupt relay coupled between an interrupt generator and the CPU. A functional stage is coupled to the interrupt relay and functionally linked with the interrupt so as to be used during the second mode of the CPU. The interrupt relay relays the received interrupt to the CPU only after a time needed for the functional stage to settle. Power is saved because the CPU is not powered while waiting for the functional stage to settle.