Interrupt Routing by Processor Package and Core State

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Solution Overview

Problem

Conventional interrupt routing algorithms in system-on-chip (SoC) processors do not consider hardware packaging and architecture awareness, leading to inefficient interrupt delivery and potential wear-out of processor cores due to underutilization and overutilization issues, causing power and performance problems.

Innovation Solution

Implement processor hardware packaging and architecture aware interrupt routing by detecting shared peripheral interrupts and determining an interrupt routing mode, which allows for targeted package routing, randomization, and distribution within a package/cluster's cores, considering factors like enabled/disabled state, efficiency class, and current idle state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional interrupt routing algorithms are used, then implementation simplicity is maintained, but interrupt routing accuracy deteriorates and core wear-out occurs

Engineering Contradiction:

Improveinterrupt routing accuracyVSAvoidrouting algorithm complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The interrupt routing algorithm is segmented into multiple decision stages: first determining if package routing is enabled, then checking interrupt target type, and finally selecting between different routing modes (targeted, random, or distribution). This multi-stage segmentation allows the system to achieve high routing accuracy while maintaining manageable complexity through modular decision-making.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The routing algorithm dynamically adapts its behavior based on real-time conditions. It checks whether package routing is enabled, determines the interrupt target type dynamically, and selects different routing strategies (targeted core, random core, or distributed across cores) based on current system state. This dynamic adaptation improves routing accuracy without requiring a completely complex fixed algorithm.

Inventive Principle:

Principle #15Dynamics

2Reliability

If interrupts are routed to specific cores consistently, then routing simplicity is maintained, but core wear-out accelerates due to underutilization and overutilization

Engineering Contradiction:

Improvecore longevityVSAvoidinterrupt handling efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The system dynamically selects between three routing modes based on interrupt characteristics and system state: targeted routing for specific cores, random routing for load balancing, or distribution routing for optimal resource utilization. This dynamic selection prevents any single core from being overutilized while maintaining efficient interrupt handling across the processor package.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The routing algorithm changes key parameters such as target core selection, routing strategy, and distribution weights based on interrupt type and system conditions. By adjusting these parameters dynamically, the system balances core utilization to prevent wear-out while maintaining high interrupt handling efficiency.

Inventive Principle:

Principle #35Parameter changes

3Ease of operation

If package routing is implemented, then core utilization balance improves, but routing decision complexity increases

Engineering Contradiction:

Improvecore utilization balanceVSAvoidrouting decision complexity

Core Design Contradiction:

Ease of operationVSDevice complexity

Solution Approach 1:

The routing decision process is segmented into distinct checks: first verifying if package routing is enabled, then determining interrupt target type, and finally selecting the appropriate routing mode. This segmentation breaks down the complex decision-making into manageable stages, improving core utilization balance while keeping the implementation complexity controlled through modular logic.

Inventive Principle:

Principle #1Segmentation

4Productivity

If interrupt routing considers multiple factors (enabled state, efficiency class, idle state), then routing optimization improves, but detection and measurement difficulty increases

Engineering Contradiction:

Improveinterrupt handling efficiencyVSAvoidrouting parameter detection difficulty

Core Design Contradiction:

ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The algorithm dynamically evaluates multiple factors including core enabled state, efficiency class, and idle state to make routing decisions. By integrating these multiple parameters dynamically, the system achieves optimized interrupt handling efficiency while managing the detection complexity through a unified decision-making framework that processes all factors in a coordinated manner.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS20260050563A1Processor hardware packaging and architecture aware interrupt routing

Publication Date: 2026.02.19 QUALCOMM INC

AI summary

A method for processor hardware packaging and architecture aware interrupt routing is described. The method includes detecting a shared peripheral interrupt. The method also includes determining an interrupt routing mode associated with the shared peripheral interrupt. The method further includes issuing the shared peripheral interrupt to a targeted package if package routing is detected as the interrupt routing mode.